Ps-Side: Ddr4 Sodimm Socket - Xilinx ZCU111 User Manual

I/O Voltage Rails
The XCZU28DR RFSoC PL I/O bank voltages on the ZCU111 board are listed in
Table 3-1: I/O Voltage Rails
XCZU28DR
PL bank 64
PL bank 65 VADJ_FMC
PL bank 66 VADJ_FMC
PL bank 67
PL bank 68
PL bank 69
PL bank 84
PL bank 87
PS bank 500
PS bank 501
PS bank 502
PS bank 503
PS bank 504
Notes:
1. The ZCU111 board is shipped with VADJ_FMC set to 1.8V by the MSP430 system controller.

PS-Side: DDR4 SODIMM Socket

[Figure 2-1, callout 2]
The PS-side memory is wired to the Zynq UltraScale+ DDRC bank 504 hard memory
controller. A 64-bit single rank DDR4 SODIMM is inserted into socket J50. The ZCU111
board is shipped with a DDR4 SODIMM installed:
• Manufacturer: Micron
• Part Number: MTA4ATF51264HZ-2G6E1
• Description:
4 GByte 260-pin DDR4 SODIMM
°
Single rank x16
°
512 Mbit x 64-bit
°
Supports 1333 MT/s – 2666 MT/s
°
ZCU111 Board User Guide
UG1271 (v1.1) August 6, 2018
Power Net
Voltage
Name
VCC1V8 1.8V
(1)
1.8V
(1)
1.8V
VCC1V2 1.2V
VCCIV2 1.2V
VCC1V2 1.2V
VCC1V8 1.8V
VCC1V8 1.8V
VCC1V8 1.8V
VCC1V8 1.8V
VCC1V8 1.8V
VCC1V8 1.8V
VCC1V2 1.2V
www.xilinx.com
Chapter 3: Board Component Descriptions
Connected To
GPIO
FMCP_HSPC LA BUS [0:16]
FMCP_HSPC LA BUS [17:32]
PL_DDR4_DQ[32:63]
PL_DDR4_DQ[0:31], SFPx_TX_DISABLE, SYSMON_SDA/SCL
PL_DDR4 ADDR/CTRL, PMOD0&1[0:7],MSP430_GPIO[0:3]
ADCIO[0:19], GPIO_SW[N,E,C,W]
DACIO[0:19], GPIO_SW[S], SFP_SI5382_CLK_IN_SEL
QSPI LWR/UPR, PS_GPIO2, I2Cx_SDA/SCL, UART0_RXD/TXD
DP CTRL, PMU_GPO[0:5], SDIO I/F, PS_GPIO1
USB I/F, ENET I/F
PS CONFIG I/F
PS_DDR4 64-BIT SODIMM I/F
Table 3-1.
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