Non-Buffered; Buffered - National Instruments NI 6221 User Manual

Chapter 5 Analog Output

Non-Buffered

In non-buffered acquisitions, data is written directly to the DACs on the
device. Typically, hardware-timed, non-buffered operations are used to
write single samples with good latency and known time increments
between them.

Buffered

In a buffered acquisition, data is moved from a PC buffer to the DAQ
device's onboard FIFO using DMA or interrupts for NI
PCI/PCIe/PXI/PXIe devices or USB Signal Streams for USB devices
before it is written to the DACs one sample at a time. Buffered acquisitions
typically allow for much faster transfer rates than non-buffered acquisitions
because data is moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The sample
mode can be either finite or continuous.
Finite sample mode generation refers to the generation of a specific,
predetermined number of data samples. Once the specified number of
samples has been written out, the generation stops.
Continuous generation refers to the generation of an unspecified number of
samples. Instead of generating a set number of data samples and stopping,
a continuous generation continues until you stop the operation. There are
several different methods of continuous generation that control what data is
written. These methods are regeneration, FIFO regeneration and
non-regeneration modes.
Regeneration is the repetition of the data that is already in the buffer.
Standard regeneration is when data from the PC buffer is continually
downloaded to the FIFO to be written out. New data can be written to the
PC buffer at any time without disrupting the output.
With FIFO regeneration, the entire buffer is downloaded to the FIFO and
regenerated from there. Once the data is downloaded, new data cannot be
written to the FIFO. To use FIFO regeneration, the entire buffer must fit
within the FIFO size. The advantage of using FIFO regeneration is that it
does not require communication with the main host memory once the
operation is started, thereby preventing any problems that may occur due to
excessive bus traffic.
© National Instruments Corporation 5-5 M Series User Manual