Table of Contents
Advertisement
Other Counter Features
Cascading Counters
Counter Filters
NI-DAQmx only supports filters on counter inputs.
Note
Filter Setting
125 ns
6.425 µs
2.56 ms
Disabled
© National Instruments Corporation
You can internally route the Counter n Internal Output and Counter n TC
signals of each counter to the Gate inputs of the other counter. By cascading
two counters together, you can effectively create a 64-bit counter. By
cascading counters, you also can enable other applications. For example, to
improve the accuracy of frequency measurements, use reciprocal frequency
measurement, as described in the
Frequencies Using Two Counters
You can enable a programmable debouncing filter on each PFI, RTSI, or
PXI_STAR signal. When the filters are enabled, your device samples the
input on each rising edge of a filter clock. M Series devices use an onboard
oscillator to generate the filter clock with a 40 MHz frequency.
The following is an example of low to high transitions of the input signal.
High to low transitions work similarly.
Assume that an input terminal has been low for a long time. The input
terminal then changes from low to high, but glitches several times. When
the filter clock has sampled the signal high on N consecutive edges, the low
to high transition is propagated to the rest of the circuit. The value of N
depends on the filter setting; refer to Table 7-5.
Table 7-5. Filters
N (Filter Clocks
Needed to
Pass Signal)
5
257
~101,800
—
Method 3—Measure Large Range of
section.
Pulse Width
Guaranteed to
Pass Filter
125 ns
6.425 µs
2.56 ms
—
7-33
Chapter 7
Counters
Pulse Width
Guaranteed to
Not Pass Filter
100 ns
6.400 µs
2.54 ms
—
M Series User Manual
Hide quick links:
Advertisement
Table of Contents
