Rtsi Filters - National Instruments NI 6221 User Manual

RTSI Filters

Note NI-DAQmx only supports filters on counter inputs.
Filter Setting
125 ns
6.425 µs
2.56 ms
Disabled
© National Instruments Corporation
• Counter input signals for either counter—Source, Gate, Aux,
HW_Arm, A, B, or Z
• DI Sample Clock
• DO Sample Clock
Most functions allow you to configure the polarity of PFI inputs and
whether the input is edge or level sensitive.
You can enable a programmable debouncing filter on each PFI, RTSI, or
PXI_STAR signal. When the filters are enabled, your device samples the
input on each rising edge of a filter clock. M Series devices use an onboard
oscillator to generate the filter clock with a 40 MHz frequency.
The following is an example of low to high transitions of the input signal.
High to low transitions work similarly.
Assume that an input terminal has been low for a long time. The input
terminal then changes from low to high, but glitches several times. When
the filter clock has sampled the signal high on N consecutive edges, the low
to high transition is propagated to the rest of the circuit. The value of N
depends on the filter setting; refer to Table 9-2.
Table 9-2. Filters
N (Filter Clocks
Needed to
Pass Signal)
5
257
~101,800
—
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 9-3 shows an example of a low to high
transition on an input that has its filter set to 125 ns (N = 5).
Chapter 9
Pulse Width
Guaranteed to
Pass Filter
125 ns
6.425 µs
2.56 ms
—
9-7
Digital Routing and Clock Generation
Pulse Width
Guaranteed to
Not Pass Filter
100 ns
6.400 µs
2.54 ms
—
M Series User Manual