Samsung S3C6400X User Manual page 30

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S3C6400
RISC MICROPROCESSOR
XpcmFSYNC[1]
O IO O
XpcmSIN[1]
I
I
I
XpcmSOUT[1]
O O O
Signal
I/O
XpcmDCLK[0]
O
XpcmEXTCLK[0]
I
XpcmFSYNC[0]
O
XpcmSIN[0]
I
XpcmSOUT[0]
O
XpcmDCLK[1]
O
XpcmEXTCLK[1]
I
XpcmFSYNC[1]
O
XpcmSIN[1]
I
XpcmSOUT[1]
O
Xi2sLRCK[1:0]
IO
Xi2sCDCLK[1:0]
O
Xi2sCLK[1:0]
IO
Xi2sDI[1:0]
I
Xi2sDO[1:0]
O
X97BITCLK
I
X97RESETn
O
X97SYNC
O
X97SDI
I
X97SDO
O
ADDR_CF[2:0]
O
EINT3[4:0]
I
USB Host
Signal
I/O
XuhDN
IO
XuhDP
IO
USB OTG
Signal
I/O
XusbDP
IO
IO
I
XpcmFSYNC[1]
IO
I
XpcmSIN[1]
IO
I
XpcmSOUT[1]
PCM Serial Shift Clock
optional reference clock (divided internally to generate PCM timing and XpcmDCLK)
PCM Sync indicating start of word
PCM Serial Data Input
PCM Serial Data Output
PCM Serial Shift Clock
optional reference clock (divided internally to generate PCM timing and XpcmDCLK)
PCM Sync indicating start of word
PCM Serial Data Input
PCM Serial Data Output
IIS-bus channel select clock
IIS CODEC system clock
IIS-bus serial clock
IIS-bus serial data input
IIS-bus serial data output
AC-Link bit clock(12.288MHz) from AC97 Codec to AC97 Controller
AC-link Reset to Codec
AC-link Frame Synchronization (Sampling Frequency 48Khz) from AC97 Controller
to AC97 Codec
AC-link Serial Data input from AC97 Codec
AC-link Serial Data output to AC97 Codec
CF card address
External Interrupt 3
USB Data pin DATA(–) for USB 1.1 Host
USB Data pin DATA(+) for USB 1.1 Host
USB Data pin DATA(+)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Xi2sLRCK[1]
X97SYNC
Xi2sDI[1]
X97SDI
Xi2sDO[1]
X97SDO
Description
Description
Description
PRODUCT OVERVIEW
GPE[2]
GPE[3]
GPE[4]
1-27

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