Samsung S3C6400X User Manual page 25

PRODUCT OVERVIEW
Signal
0
Xm0INTata
Xm0RESETata
Xm0INPACKata
Xm0REGata
Xm0WEata
Xm0OEata
Xm0CData
Signal I/O
ADDR[15:0] O
DATA[15:0] O
nCS[7:6] O
nCS[5:4] O
O
nCS[3:2]
nCS[1:0] O
nBE[1:0] O
WAITn I
nOE O
nWE O
ADDRVALID O
SMCLK O
RDY[0] I
RDY[1] I
INT[0] I
INT[1] I
RP O
ALE O
O
CLE
FWEn O
FREn O
RnB I
nIORD_CF O
O
nIOWR_CF
IORDY I
INT I
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
1-22
I/O
1 2 3 4 5 6
I IO I
O IO I
I IO I
O IO I
O IO I
O IO I
I IO I
Memory port 0 common address bus
Memory port 0 common data bus
Memory port 0 DRAM Chip Select support up to 2 memory bank
Memory port 0 SROM/CF Chip Select support up to 2 memory bank.
Memory port 0 SROM / OneNAND / NAND Flash Chip Select support up to 2
memory bank.
Memory port 0 SROM Chip Select support up to 2 memory bank.
Memory port 0 SROM Byte Enable
Memory port 0 SROM Wait
Memory port 0 SROM / OneNAND Output Enable
Memory port 0 SROM / OneNAND Write Enable
Memory port 0 OneNAND Address Valid
Memory port 0 OneNAND Clock
Memory port 0 OneNAND Bank 0 Ready
Memory port 0 OneNAND Bank 1 Ready
Memory port 0 OneNAND Bank 0 Interrupt
Memory port 0 OneNAND Bank 1 Interrupt
Memory port 0 OneNAND Reset
Memory port 0 NAND Flash Address Latch Enable
Memory port 0 NAND Flash Command Latch Enable
Memory port 0 NAND Flash Write Enable
Memory port 0 NAND Flash Read Enable
Memory port 0 NAND Flash Ready/Busy
Memory port 0 CF Read strobe for I/O mode
Memory port 0 CF Write strobe for I/O mode
Memory port 0 CF Wait signal form CF card
Memory port 0 CF Interrupt request from ATAPI controller
Function
0 1 2
RESET
INPACK
REG
WEn
OEn
CDn
Description
S3C6400 RISC MICROPROCESSOR
3 4 5
INT GPP[8]
GPP[9]
GPP[10]
GPP[11]
GPP[12]
GPP[13]
GPP[14]
6
EINT8[8]
EINT8[9]
EINT8[10]
EINT8[11]
EINT8[12]
EINT8[13]
EINT8[14]