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MX-G68V/MX-G65V
W9923QF (MIC4) : VCD driver
1. Pin layout
GP1
1
GP0
2
CS#
3
MD<15>
4
MD<14>
5
VDDI
6
VSSI
7
MD<13>
8
MD<12>
9
MD<11>
10
MD<10>
11
MD<9>
12
MD<8>
13
VDDB
14
VSSB
15
MD<7>
16
MD<6>
17
MD<5>
18
MD<4>
19
MD<3>
20
MD<2>
21
VDDI
22
VSSI
23
MD<1>
24
MD<0>
25
CASI#
26
VDD5V
27
MA<8>
28
MA<7>
29
MA<6>
30
2 Pin function
Symbol
Pin No.
1~2
GP0~1
CS#
3
4 ~5
MD<14~15>
VDD
6,14,22,35
VSS
7,15,23,36,44
8~13
MD<8~13>
16~21
MD<2~7>
MD<0~1>
24~25
26
CASIN#
1-48
C
A
R
C
C
A
V
V
C
D
C
E
D
D
C
S
D
2
C
L
S
W
L
S
D
S
P
L
K
E
S
D
K
I
I
O
T
K
O
1 9 9 9 9 9 9 9 9 9 9 8 8 8 8 8 8 8 8 8
0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1
0
W9923QF
3 3 3 3 3 3 3 3 3
1 2 3 4 5 6 7 8 9
M
M
M
V
V
M
M
C
M
A
A
A
A
A
A
D
S
A
1
0
5
4 3
2
D
S
S
B
B
#
type
I/O
Programmable input/output 1
I
Chip select input, active LOW; optional
I/O
DRAM data bus
3.3V power supply
0V ground
I/O
DRAM data bus
I/O
DRAM data bus
I/O
DRAM data bus
Column address strobe input to lach data from DRAM,
rising edge active
S
S
S
S
S
V
S
S
S
A
A
A
A
A
D
A
A
A
^
^
^
D
^
^
^
^
^
0
1
2
3
4
5
5
6
7
v
v
v
v
v
V
v
v
v
4 4 4 4 4 4 4 4 4 4
0 1 2 3 4 5 6 7 8 9
W
R
D
V
V
P
P
P
E
E
A
A
D
S
C
C
C
M
#
S
D
S
E
M
M
M
P
#
I
I
M
C
W
S
P
L
S
D
K
Function
R
W
D
R
#
#
80
IRQ#
79
SO#
78
ALE
77
RDY#
76
MCLK
75
VSSI
74
SD<7>
73
SD<6>
72
SD<5>
71
VSSB
70
SD<4>
69
VDDI
68
SD<3>
67
SD<2>
66
SD<1>
65
SD<0>
64
VSSI
63
BLANK
62
PD<0>
61
PD<1>
60
VDDB
59
PD<2>
58
PD<3>
57
VCLK
56
VSSB
55
PD<4>
54
PD<5>
53
PD<6>
52
PD<7>
51
CSYNC
5
0
V
H
S
S
Y
Y
N
N
C
C
#
#
(1/2)
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