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Note: This is a general block diagram. Please see Chapter 5 for details.
x4
JPEIC11 PCIE3.0 x8
x8
JPEIC9 PCIE3.0 x8
x16
JPEIC8 PCIE3.0 x16
x16
JPEIC6 PCIE3.0 x16
#1
#1
PE3
#2
#2
F
E
P00_P11
LANE Reversal
#1
#1
#2
#2
D
C
PE3
x16
JPEIC4 PCIE3.0 x16
x16
JPEIC2 PCIE3.0 x16
x8
JPEIC10 PCIE3.0 x16
UL1
Powerville Dual GbE
I350AM2
JLAN1
JLAN2
RJ45
RJ45
Figure 1-1. Intel C602 Chipset:
System Block Diagram
#1
PE2
PE1
DMI
#2
H
CPU REAR
U7C1 Socket 01
Processor
Sandybridge
P0
P1
#1
P1
P0
#2
B
CPU REAR
U6H1 Socket 00
Sandybridge
PE2
PE1
DMI
DMI: LANE Reversal
DMI
PEG [0..3]
SSB
PATSBURG-A
SATA Gen3 [0..3]
PET8
x1
UM1
RENESAS
VGA
VGA CONN
#1
#2
G
#1
#2
A
BIOS
SPI Flash
SPI
SATA [0..5]
PET [1..7]
USB [0..9]
REAR
USB [10,11]
LPC
BMC
Super I/O
PHY
W83527
RTL8211E
IPMI LAN
RJ45
1-5
Chapter 1: Introduction
0,1
2,3
port 4 port 5
6,7 8,9
REAR TYPE A TYPE A
HW Monitor
NCT7904D
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