Features; Features Not Supported; Functional Block Diagram; Video Port Interface (Vpif) Block Diagram - Texas Instruments AM1808 Technical Reference Manual

Sitara arm microprocessor
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Introduction

35.1.2 Features

The VPIF is designed to support the following features (note that some device designs may support
reduced features because of system-level performance limitations):
ITU-BT.656 format
ITU-BT.1120 and SMTPE 296 formats
Raw data capture
VBI data storage
Clipping of output data (to eliminate FFh and 00h values)

35.1.3 Features Not Supported

The following functions are not supported:
ITU-BT.601 format
Separated synchronization format (requiring vertical sync, horizontal sync, and field ID signals
independent of the pixel data) is not supported (except for the raw data capture mode)

35.1.4 Functional Block Diagram

A block diagram of the VPIF is shown in
VPIF is shown in
Figure
Pin MUX on pad
vdata_00[15-0]
vdata_01[15-0]
1760
Video Port Interface (VPIF)
Figure
35-3.
Figure 35-2. Video Port Interface (VPIF) Block Diagram
vdata_in_00[7-0]
vdata_in_01[7-0]
vdata_in_00[7-0]
vdata_in_00[7-0] (Y)
vdata_in_01[7-0] (C)
vdata_in_01[7-0]
raw_vdata_in_00[11-0]
raw_vsync
raw_hsync
raw_field_id
vdata_out_00[7-0]
vdata_out_00[7-0]
vdata_out_01[7-0]
vdata_out_01[7-0]
vdata_out_00[7-0] (Y)
vdata_out_01[7-0] (C)
Copyright © 2013–2016, Texas Instruments Incorporated
35-2. A block diagram of the internal architecture of the
Video port interface
Rec.656
video receive
Rec.656
video receive
Rec.1120
video receive
Raw input
receiver
Rec.656
video transmit
Rec.656
video transmit
Rec.1120
video transmit
MEMORY
SPRUH82C – April 2013 – Revised September 2016
www.ti.com
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