Bus Operation; Bus Transfer Signals - Motorola MC68030 User Manual

Enhanced 32-811 microprocessor
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SECTION 7
BUS OPERATION
This section provides a functional description of the bus, the signals that
control it, and the bus cycles provided for data transfer operations. It also
describes the error and halt conditions, bus arbitration, and the reset oper-
ation. Operation of the bus is the same whether the processor or an external
device is the bus master; the names and descriptions of bus cycles are from
the point of view of the bus master. For exact timing specifications, refer to
SECTION 13 ELECTRICAL CHARACTERISTICS.
The MC68030 architecture supports byte, word, and long-word operands,
allowing access to 8-, 16-, and 32-bit data ports through the use of asyn-
chronous cycles controlled by the data transfer and size acknowledge inputs
(DSACKO and DSACK1).
Synchronous bus cycles controlled by the synchronous termination signal
(STERM) can only be used to transfer data to and from 32-bit ports.
The MC68030 allows byte, word, and long-word operands to be located in
memory on any byte boundary. For a misaligned transfer, more than one
bus cycle may be required to complete the transfer, regardless of port size.
For a port less than 32 bits wide, multiple bus cycles may be required for an
operand transfer due to either misalignment or a port width smaller than the
operand size. Instruction words and their associated extension words must
be aligned on word boundaries. The user should be aware that misalignment
of word or long-word operands can cause the MC68030 to perform multiple
bus cycles for the operand transfer; therefore, processor performance is
optimized if word and long-word memory operands are aligned on word or
long-word boundaries, respectively.
7.1 BUS TRANSFER SIGNALS
The bus transfers information between the MC68030 and an external mem-
ory, coprocessor, or peripheral device. External devices can accept or provide
8 bits, 16 bits, or 32 bits in parallel and must follow the handshake protocol
described in this section. The maximum number of bits accepted or provided
during a bus transfer is defined as the port width. The MC68030 contains an
MOTOROLA
MC68030 USER'S MANUAL
7-1

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