Voltage Differential Settings; Synchronising Bypass Logic; Slip And Phase Angle Relationship - Siemens 7SR224 Technical Manual

4.2.4

Voltage Differential Settings

A differential voltage detector is incorporated and this, if enabled, blocks the synchronising function if the
difference between the measured bus and line voltages is greater than the setting. This is used to prevent closing
of the circuit breaker with a large voltage differential between the line (incoming) or bus (running) voltages, which
could overstress the electrical systems. Typically, the differential voltage elements are set below 10% of rated
voltage.
4.2.5

Synchronising Bypass Logic

The relay Dead and Live voltage monitors are used along with corresponding internal logic to bypass the
synchronising operation of the relay. Typically, anywhere above 80% to 90% of rating can be classed as a live
line or live bus. The dead voltage monitors should be set to somewhere above the expected level of induced
voltages on the line or bus. It should be noted that a dead line or dead bus can have a considerable potential
induced onto it from a parallel line or via capacitance across open breaker contacts. This potential on some
networks can be as high as 30% of rated voltage.
The synchronising Bypass logic can be enabled, if required, to provide the following:
•
Line charging and/or Bus charging, from the other side which is live.
•
Close with both sides dead,
•
Synchronising check with both sides live.
•
Unconditional Close (ignore all voltage conditions)
Different options can be enabled for Manual Closing and DAR operations. This can be used for example to allow
MC operations to be carried out with both sides dead for normal operational switching but prevent closing if the
condition occurred during DAR. Alternatively, the device at one line end can be set to provide line charging whilst
the other only Check Sync, i.e. after the line has been restored and become live.
Additional DLC and DBC delays are provided to allow co-ordination of devices whilst also allowing a close applied
conditions after a delay if the normally expected conditions are not met. For example, a device which will usually
be the second end to close, thus operating in Check Sync mode, can allow Dead Line Close after a further delay,
thus charging the line if the first end fails to close.
4.2.6

Slip and Phase Angle Relationship

Slip frequency is defined as the difference between two frequencies. Where a slip frequency exists between two
separate systems, during a 'slip' cycle the two voltage vectors will be in anti-phase at one point in time. The phase
angle difference will vary between being in phase and anti-phase. The relay can be set to measure slip frequency
in two ways. One way is to measure the two system frequencies directly and calculate the difference. Another
way is to measure the phase difference between the two systems and check that the phase angle change in a
defined time period is less than a predetermined value. If F1 and F2 represent the frequencies of two systems
then it can be shown that for check synchronising operation,
θ
1
Δ = − = ×
F 1 F F 2
Td 180
where Td = time delay setting and θ = phase angle setting.
For system synchronising operation the following formula is used because in this mode the relay will only issue a
close signal if the phase angle is decreasing in value. It will not issue a close if the phase angle is increasing in
value.
θ
1
Δ = − = ×
F 1 F F 2
Td 360
where Td = time delay setting and θ = phase angle setting.
The relay has both a frequency measuring element and phase detector and so can be set up to measure slip
either directly or by the phase detector plus timer method. Use of either method is perfectly valid, as is use of both
at the same time.
Note : if using both the slip frequency detector and the phase angle plus slip timer for a particular scheme then
care has to be taken in setting selection. It is possible to set the relay up with an incorrect slip timer setting which
will prevent the relay from issuing a valid close signal.
e.g. - a system with a high rate of slip which is within the allowable slip frequency limit, could be set up with too
long a slip timer setting. This would mean that the incoming vector could pass through the valid close window too
quickly and not allow the slip timer to time out and give a valid output.
©2010 Siemens Protection Devices Limited
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7SR224 Argus Applications
Chapter 7 Page 33 of 50