Pci Local Bus Memory Map; Vmebus Memory Map; System Bus - Motorola MVME5100 Programmer's Reference Manual

Product Data and Memory Maps
1

PCI Local Bus Memory Map

VMEbus Memory Map

System Bus

1-8
The PCI memory map is controlled by the MPU/PCI bus bridge controller
portion of the Hawk ASIC and by the Universe PCI/VME bus bridge
ASIC. The Hawk and Universe devices adjust system mapping to suit a
given application via programmable map decoder registers.
No default PCI memory map exists. Resetting the system turns the PCI
map decoders off, and they must be reprogrammed in software for the
intended application.
For detailed PCI memory maps, including suggested CHRP- and PREP-
compatible memory maps, refer to the Hawk portion of this manual
(Chapters 2 and 3).
The map of the VMEbus is programmable. Like other parts of the
MVME510x memory map, the mapping of local resources as viewed by
VMEbus masters varies among applications.
The Universe PCI/VME bus bridge ASIC includes a user-programmable
map decoder for the VMEbus-to-local-bus interface. The address
translation capabilities of the Universe enable the processor to access any
range of addresses on the VMEbus.
Recommendations for VMEbus mapping, including suggested CHRP- and
PREP-compatible memory maps, can be found in the Hawk portion of this
manual (Chapters 2 and 3).
The following sections describe the processor system bus for the
MVME5100. Only the PPC60x bus interface is supported.
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