Figure 2-4. Pci To Ppc Address Decoding - Motorola MVME5100 Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
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2-20
PPC Bus Address Space
The PHB maps PPC address space into PCI Memory space using four
programmable map decoders. The most significant 16 bits of the PCI
address is compared with the address range of each map decoder, and if the
address falls within the specified range, the access is passed on to the PPC
bus. An example of this is shown in
PCI Bus Address
Decode is
PSADDx Register

Figure 2-4. PCI to PPC Address Decoding

There are no limits imposed by the PHB on how large of an address space
a map decoder can represent. There is a lower limit of a minimum of 64KB
due to the resolution of the address compare logic.
For each map, there is an independent set of attributes. These attributes are
used to enable read accesses, enable write accesses, enable write posting,
and define the PPC bus transfer characteristics.
Figure 2-4.
8 0 8 0 1 2 3 4
31 16 15
>= and <=
7 0 8 0 9 0 0 0
31 16 15
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