Current Task Priority Registers; Interrupt Acknowledge Registers - Motorola MVME5100 Programmer's Reference Manual
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- Programmer's reference manual (270 pages) ,
- Manual (127 pages) ,
- Installation & use manual (107 pages)
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Current Task Priority Registers
Offset
Bit
3
3
2
2
1
0
9
8
Name
Operation
R
Reset
$00
There is one Task Priority Register per processor. Priority levels from 0
(lowest) to 15 (highest) are supported. Setting the Task Priority Register to
15 masks all interrupts to this processor. Hardware will set the task register
to $F when it is reset or when the Init bit associated with this processor is
written to a one.
TP
Interrupt Acknowledge Registers
Offset
Bit
3
3
2
2
1
0
9
8
Name
Operation
R
Reset
$00
On PowerPC-based systems, Interrupt Acknowledge is implemented as a
read request to a memory-mapped Interrupt Acknowledge register.
Reading the Interrupt Acknowledge register returns the interrupt vector
corresponding to the highest priority pending interrupt. Reading this
register also has the following side effects. Reading this register without a
pending interrupt will return a value of $FF hex.
VECTOR Vector. This vector is returned when the Interrupt
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Processor 0 $20080
Processor 1 $21080
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
CURRENT TASK PRIORITY
R
$00
Task Priority of processor.
Processor 0 $200A0
Processor 1 $210A0
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
R
$00
The associated bit in the Interrupt Pending Register is cleared.
Reading this register will update the In-Service register.
Acknowledge register is read.
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
Registers
TP
R
R/W
$0
$F
VECTOR
R
$FF
2-127
2
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