Oki OKIPAGE 10e Maintenance Manual page 185

3.4 EEPROM Control
The 93LC66ARF E2 is an electrical erasable/programmable ROM of 256 x 16-bit configuration.
Data input to and output from the ROM are bidirectionally transferred in units of 16 bits through
a serial I/O port (SSTXD-P) in serial transmission synchronized with a clock signal from the CPU.
The EEPROM operates in the following instruction modes
The EEPROM operates in the following instruction modes
Instruction
Read (READ)
Write Enabled (WEN)
Write (WRITE) 1
Write All Address (WRAL)
Write Disabled (WDS)
Erase
Chip Erasable (ERAL)
Write cycle timing (WRITE)
CS
SK
DI
DO
HIGH-Z
Read cycle timing (READ)
CS
SK
DI
DO
HIGH-Z
41266201TH Rev.1
SSTXD-P
154
CPU
150
151
Start bit
1
1
1
1
1
1
1
1 2 4
A7 A6
1 0 1
1 2 4
A7 A6
1 1 0
3
DI
1
EEPRMCS0-P
CS
EEPRMCLK-P
Operation
code
10
00 11XXXXXX
01
00 01XXXXXX
00 00XXXXXX
11
00 10XXXXXX
11 12
A1 A0 D15 D14
11 12
A1 A0
0 D15 D14
DO
4
SK
2
Address Data
A7 to A0
A7 to A0
D15 to D0
A7 to A0
Min. 2µs
STATUS
27
D1 D0
Max. 500 ns
BUSY READY
Max. 10 ms
27 28
D1 D0 D15 D14
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