Sony SCD-C222ES Service Manual page 69

• MAIN BOARD IC801 CXD2752R (DSD DECODER)
Pin No. Pin Name
1 VSC
2 XMSLAT
3 MSCK
4 MSDATI
5 VDC
6 MSDATO
7 MSREADY
8 XMSDOE
9 XRST
10 SMUTE
11 MCKI
12 VSIO
13 EXCKO1
14 EXCKO2
15 LRCK
16 FRAME
17 VDIO
18 to 21 MNT0 to MNT3
22 to 25 TESTO
26 TCK
27 TDI
28 VSC
29 TDO
30 TMS
31 TRST
32 to 34 TEST1 to TEST3
35 VDC
36 TESTO
37 XBIT
SUPDT0 to
38 to 41
SUPDT3
42 VSIO
43, 44
SUPDT4, SUPDT5
45 VDIO
46, 47
SUPDT6, SUPDT7
48 XSUPAK
49 VSC
50 TESTO
51, 52 TESTI
53 TESTO
54 VDC
55, 56 TESTO
57 BCKASL
58 VSDSD
59 BCKAI
I/O
—
Ground terminal (for core)
I
Serial data latch pulse signal input from the CPU (IC901)
I
Serial data transfer clock signal input from the CPU (IC901)
I
Serial data input from the CPU (IC901)
—
Power supply terminal (+2.5V) (for core)
O
Serial data output to the CPU (IC901)
O
Ready signal output to the CPU (IC901) "L": ready
O
Serial data output enable signal output terminal Not used (open)
I
Reset signal input from the I/O expander (IC902) "L": reset
I
Muting on/off signal input from the CPU (IC901) "H": muting on
I Master clock signal (33.8688 MHz) input terminal
—
Ground terminal (for I/O)
O
External clock 1 signal output terminal Not used (open)
O
External clock 2 signal output terminal Not used (open)
O L/R sampling clock signal (44.1kHz) output terminal Not used (open)
O
Frame signal output terminal Not used (open)
—
Power supply terminal (+3.3V) (for I/O)
O
Monitor signal output terminal Not used (open)
O Output terminal for the test (normally: open)
I
Clock signal input terminal for the test (normally: fixed at "L")
I
Input terminal for the test (normally: open)
—
Ground terminal (for core)
O Output terminal for the test (normally: open)
I
Input terminal for the test (normally: open)
I
Reset terminal for the test (normally: fixed at "L")
I
Input terminal for the test (normally: fixed at "L")
— Power supply terminal (+2.5V) (for core)
O
Output terminal for the test (normally: open)
O
Monitor terminal relative to DST Not used (open)
O
Supplementary data output terminal Not used (open)
—
Ground terminal (for I/O)
O
Supplementary data output terminal Not used (open)
—
Power supply terminal (+3.3V) (for I/O)
O
Supplementary data output terminal Not used (open)
O
Supplementary data acknowledge signal output terminal Not used (open)
—
Ground terminal (for core)
O
Output terminal for the test (normally: open)
I
Input terminal for the test (normally: fixed at "L")
O Output terminal for the test (normally: open)
—
Power supply terminal (+2.5V) (for core)
O
Output terminal for the test (normally: open)
Input/output selection signal input terminal of bit clock signal (2.8224 MHz) for DSD data output
I
"L": input (slave), "H": output (master) (fixed at "L" in this set)
—
Ground terminal (for DSD data output)
I Bit clock signal (2.8224 MHz) input for DSD data output from the CXD9647R (IC803)
Description
SCD-C222ES
69