Diagrams; Block Diagram - Rf/Servo Section - Sony SCD-C222ES Service Manual

SCD-C222ES
SECTION 6

DIAGRAMS

6-1.
OPTICAL PICK-UP
(KHM-230AAA)
BLOCK DIAGRAM – RF/SERVO Section –
RF
DVDRFP
1
MUX
RFSIN
63
DETECTOR
A
A2
3
B
B2
4
GCA,
C
C2
5 EQ
D D2
6
E
VC
CD E
SUMMING AMP
18
F
IC004 (1/4)
GCA
CD F
17
G
A
SUMMING AMP
12
H
IC004 (2/4)
B
11
C
10
VC
D
9
(+2.5V)
MUX
A CD A
16
B
BLOCK CD B
15
C
CD C
14
D CD D
13
AUTOMATIC POWER
CD LD CDLD
CONTROL (FOR CD) 22
LASER
Q003
DIODE
(FOR CD) CD PD
CDPD
24
DUAL
APC
AUTOMATIC POWER
DVD LD DVDLD
CONTROL (FOR SACD) 21
LASER
Q001
DIODE
(FOR SACD) DVD PD DVDPD
23
VMOD
MODULE B+ SWITCH
A +5V
CIRCUIT B+ Q002, 005
FOCUS/TRACKING COIL DRIVER,
SLED MOTOR DRIVER
IC502
FCS+
12
FOCUS COIL
FCS–
DRIVE
11
2AXIS
DEVICE
FOCUS/
TRACKING
COIL TRK+
14
TRACKING COIL
TRK–
13 DRIVE
17
M2 SLED MOTOR
M M
(SLED) 18 DRIVE
8 SPINDLE MOTOR
M3
M M
DRIVE
(SPINDLE) 9
LOADING/TRAY MOTOR DRIVE
IC11
OUT1+
8
M10 LOADING MOTOR
M M
OUT1–
DRIVE
(LOADING) 9
OUT2+
11 TRAY MOTOR
M11
M M
OUT2–
DRIVE
(TRAY) 10
ATOP AIP FNP
INPUT PROGRAMMABLE
61 59 53
ATT AIN BIAS, EQ FILTER
ATON FNN
62 60 52
AGC DIFFERENTIATOR
AGCO
+
CLAMP&
– ENVELOPE
+
SEL
–
LEVEL DAC
PHASE
COMPARATOR MUX L. P. F. SUB
DETECTOR
+
–
A
+
GCA
+
C
+
L. P. F.
GCA
–
L. P. F. B
+
+
D
+
L. P. F.
+
AGCO
SACD/CD RF AMP,
FOCUS/TRACKING ERROR AMP
IC001
5
6
STBY1
9
2
3
24
23
STBY2 MUTE 2D
20
SPDA
15 16 BUFFER 17
MUTE2 SP ON
13
SPINDLE MOTOR DRIVE
MUTE LOAD
MUTE1 2
IC512
FIN1 LOAD IN
2
RIN1 LOAD OUT
3
RIN2 TBLL
16
FIN2 TBLR
17
30 30
DIP
54
RFAC
57
DIN
55
FULL WAVE
RECTIFER
AGC
CHARGE PUMP
TE
OFFSET
GCA 39
CANCEL
SDATA SDATA
47
SERIAL
SCLK SCLK
PORT 46
SDEN SDEN
REGISTER
48
FE/PI
MNTR 42
OFFSET FE FE
GCA 40
CANCEL
OFFSET PI PI ERROR AMP
38
CANCEL IC004 (3/4)
AVC
MEVO
(+1.65V)
MUX 32
BOTTOM
ENVELOPE
DRVC
INPUT MIN
31
(+2.5V)
BUFFER
PEAK/
MIRR
27
BOTTOM
HOLD
LDON
26
40 41 39 43
DIGITAL SERVO
PROCESSOR
IC509 (1/2)
A/D
CONVERTER
FFDR
33
FRDR
34
FOK
22
FOCUS
DFCT, FOK MIRR
TFDR TRACKING/SLED 20
31 DETECTOR
DFCT
SERVO DSP
TRDR 21
32
COUT
SFDR 19
SERVO
29
SCLK
SRDR INTERFACE
8
30
SERVO AUTO
SEQUENCER
TO CPU INTERFACE
26
S1
(LIMIT)
D+3.3V
RFAC
1
(Page 31)
• SIGNAL PATH
: SACD PLAY
: CD PLAY
TE, FE
2
(Page 32)
SDATA, SCLK, SDEN
3
(Page 32)
AVC BUFFER
A+3.3V
IC004 (4/4)
DRVC BUFFER
D+5V
IC503
LDON
4
(Page 31)
VMOD
5
(Page 32)
FOK, MIRR,
COUT, SCLK
FOK
6
(Page 32)
MIRR
COUT
SCLK
LIM SW
7
(Page 32)
SPDA, FJMP1/2
8
(Page 31)
SPIN
9
(Page 31)
MUTE 2D, SP ON, MUTE LOAD
10
(Page 32)
LOAD I/O, TBLL, TBLR
11
(Page 32)