Sanyo PLC-EF10E Service Manual page 47

CPU Port Functions
Pin No. Function Name
51 CAL-END
52 FPGA CONT
53 CS3
54 CS2
55 VSS GND
56 DB_29
57 DB_28
58 DB_27
59 DB_26
60 DB_25
61 VSS GND
62 DB_24
63 VCC 3.3V
64 DB_23
65 DB_22
66 DB_21
67 DB_20
68 DB_19
69 DB_18
70 DB_17
71 VSS GND
72 DB_16
73 DB_15
74 DB_14
75 DB_13
76 DB_12
77 VCC 3.3V
78 DB_11
79 VSS GND
80 DB_10
81 DB_9
82 DB_8
83 DB_7
84 DB_6
85 VCC 3.3V
86 DB_5
87 VSS GND
88 DB_4
89 DB_3
90 DB_2
91 DB_1
92 DB_0
93 VSS GND
94 XTAL
95 MODE3
96 EXTAL
97 MODE2
98 NONMASK
99 FWP
100 FLASH_MODE
Function
FPGA Operation completed when signal change "L" to "H"
FPGA Activate
Chip Select for SRAM
Chip Select for USB/LCD driver
Data bus29
Data bus28
Data bus27
Data bus26
Data bus25
Data bus24
Data bus23
Data bus22
Data bus21
Data bus20
Data bus19
Data bus18
Data bus17
Data bus16
Data bus15
Data bus14
Data bus13
Data bus12
Data bus11
Data bus10
Data bus9
Data bus8
Data bus7
Data bus6
Data bus5
Data bus4
Data bus3
Data bus2
Data bus1
Data bus0
X'tal Oscillator Input
Multiplier Setting with Mode 3
X'tal Oscillator Output
Multiplier Setting with Mode 2
Non-Maskarable Input
Flash Memory Write Mode
FWP Control
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IN/OUT
IN
OUT
OUT
OUT
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IN/OUT
IN/OUT
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IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN/OUT
IN
IN
OUT
IN
IN
IN
OUT