Display Controller - Pin Function - Casio QT-6100 Service Manual

8-10-2. Pin Function
PIN NAME I/O
Host Interface
AD [31:0] PCI multiplexed Address and Data Bus. A bus transaction consists of an address cycle followed by one or
I/O
more data cycles.
C/ PCI Bus Command and Byte Enables. These signals carry the bus command during the address cycle and
I/O
~BE [3:0] byte enable during data cycles.
PAR I/O Parity. LynxEM+ asserts this signal to verify even parity across AD [31:0] and C/~BE [3:0].
~FRAME Cycle Frame. LynxEM+ asserts this signal to indicate the beginning and duration of a bus transaction. It is
I/O
de-asserted during the final data cycle of a bus transaction.
~TRDY Target Ready. A bus data cycle is completed when both ~IRDY and ~TRDY are asserted on the same
I/O
cycle.
~IRDY Initiator Ready. A bus data cycle is completed when both ~IRDY and ~TRDY are asserted on the same
I/O
cycle.
~STOP Stop. LynxEM+ asserts this signal to indicate that the current target is requesting the master to stop current
I/O
transaction.
~DEVSEL Device Select. LynxEM+ asserts this signal when it decodes its addresses as the target of the current
I/O
transaction.
IDSEL I ID Select. This input is used during PCI configuration read/write cycles.
CLK I PCI System Clock, 33 MHz.
~RST PCI System Reset. LynxEM+ asserts this signal to force registers and state machines to initial default
I
values
~REQ O PCI Bus Request (bus master mode)
~GNT I PCI Bus Grant (bus master mode)
~INTA O PCI Interrupt
Power Down Interface
~PDOWN I Power down mode enable
~CLKRUN/ ~CLKRUN or LynxEM+ Memory and I/O activity detection depending on SCR18 [7]
ACTIVITY O 0 = select ~CLKRUN
1 = select ACTIVITY
Clock Interface
REFCLK I 32 KHz refresh clock source for power down or PALCLK for PALTV
CKIN I 14.318 MHz clock (~EXCKEN = 1) or Video Clock (~EXCKEN = 0)
MCKIN/ Memory Clock In (~EXCKEN = 0) or LVDSCLK Out (~ESCKEN = 1), LVDSCLK is a free running clock
I/O
LVDSCLK which can be used to drive LVDS transmitter for DSTN panels.
~EXCKEN I External Clock Enable. Select external VCLK form CKIN and MCLK from MCKIN.
DESCRIPTION
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