Port Allocations - Icom IC-R75 Service Manual

3-5 PORT ALLOCATIONS

3-5-1 CPU (LOGIC UNIT; IC101)
Pin Port
number name
Input port for [0] and [ENT] switch
1 KEY6
from the 10-key.
Input port for the reset signal.
9 CRES Low : While the reset switch is
Input for the [POWER] switch.
11 PWRK Low : While [POWER] switch is
12 DUD Input port for the UP signal from the
[MAIN DIAL].
14 DAST Outputs strobe signals for the D/A
converter (LOGIC unit; IC351).
15 RSTB Outputs strobe signals for the shift
registor (MAIN unit; IC551, IC552).
16 ISTB Outputs strobe signals for the shift
registor (MAIN unit; IC1602).
17 ASTB Outputs strobe signals for the shift
registor (MAIN unit; IC1601).
18 ECS Outputs ECS signals for the EEPROM
(LOGIC unit; IC231).
19 MCK Outputs clock signal to the EEPROM
and shift registors.
21 MDAT Outputs data signals to the EEPROM,
shift registors, etc.
Outputs clock signals to the PLL IC
22 PCK (PLL unit; IC21) and the DDS IC (PLL
unit; IC151, IC201).
23 PST1 Outputs strobe signals for the PLL IC.
24 PDAT Outputs data signals to the PLL IC and
the DDS IC.
25 PST2 Outputs strobe signals for the DDS IC
(IC151).
26 PST3 Outputs strobe signals for the DDS IC
(IC201).
36 SSBK Input port for the [SSB] switch.
37 CWK Input port for the [CW] switch.
38 AMK Input port for the [AM] switch.
39 FMK Input port for the [FM] switch.
40 FILK Input port for the [FIL] switch.
41 TSK Input port for the [TS] switch.
42 PREK Input port for the [P.AMP] switch.
43 ATTK Input port for the [ATT] switch.
44 NRK Input port for the [NR] switch.
45 ANFK Input port for the [ANF] switch.
46 NBK Input port for the [NB] switch.
47 AGCK Input port for the [AGC] switch.
48 VMK Input port for the [V/M] switch.
Description
pushed.
pushed.
Pin Port
number name
49 MWK
50 CLRK
51 SELK
52 SCAK
53 UPK
54 DNK
55 LOCK
56 SETK
57 CLKK
63 DRES
77 PWRS
78 BEEP
79 RXS
80 AGRS
81 SQLS
82 BKUP
83 DCK
84 RECS
90 AFGL
91 RFGL
92 PB1L
93 PB2L
94 FMNL
3 - 7
Description
Input port for the [MW] switch.
Input port for the [CLR] switch.
Input port for the [SEL] switch.
Input port for the [SCAN] switch.
Input port for the [UP] switch.
Input port for the [DN] switch.
Input port for the [LOCK] switch.
Input port for the [SET] switch.
Input port for the [CLOCK] switch.
Outputs reset signal to the PLL IC and
DDS IC.
Low: PLL IC and DDS IC is reset.
Outputs control signal for the regulator
circuit (MAIN unit; IC1371 and
D1371).
Outputs beep audio signals.
Outputs control signal for the R8 regu-
lator circuit (MAIN unit; Q1381,
Q1382, D1381).
• Outputs AGC reset signal to the
AGC delay control circuit (MAIN unit;
Q1066).
• Outputs control signal for the AGC
delay control circuit (MAIN unit;
Q1061, Q1064–Q1066).
Outputs squelch control signal to the
AF selector circuit (MAIN
IC1201).
Input port for the BKUP signal from
the reset circuit (LOGIC unit; IC391).
Input port for the UP signal from the
[MAIN DIAL].
Outputs control signal for the remote
recording driver.
Input port for the AF gain signal from
the [AF] volume on the front panel.
Input port for the SQL/RF gain signal
from the [SQL/RF] volume on the front
panel.
Input port for the PBT1 signal from the
[TWIN PBT] volume on the front
panel.
Input port for the PBT2 signal from the
[TWIN PBT] volume on the front
panel.
Input port for the FM noise squelch
signal from the FM detector circuit
(MAIN unit; IC1001 and X1001).
unit;