Port Allocations - Icom IC-R5 Service Manual

4-5 PORT ALLOCATIONS

4-5-1 CPU (LOGIC UNIT; IC1)
Pin Port
number name
2 K2 Input port for the [∫], [√] switches.
Input port for the [BAND], [V/M],
3 K1
[MODE] swtiches.
Input port for the RSSI signal from the
4 RSSI FM IF IC (RF unit; IC2, pin 12) to
detect receiving signal strength.
Input port for the power supply volt-
5 VIN
age.
• Input port for the antenna canceller
6 CTONE signal.
• Input port for the WX alert signal.
Input port for the CTCSS decode sig-
7 RTONE
nal (67–254.1 Hz).
I/O port for the data signals from/to the
14 ESIO
EEPROM (LOGIC unit; IC2, pin 5).
Outputs clock signal to the EEPROM
15 ECK
IC (LOGIC unit; IC2, pin 6).
Outputs reset signal to the CPU
19 RESET (LOGIC unit; IC1, pin 19).
High: The CPU is reset.
Input port for the [POWER] switch.
25 POWER
Low: [POWER] switch is pushed.
Input port for the external power sup-
ply detecting signal.
26 HVDET
Low: While external power supply is
Outputs clock shift control signal.
28 CLS
High: While clock is shifting.
30 CLIN Input port for the cloning data.
31 CLOUT Outputs the cloning data.
32 PDAUL Outputs data signal to the PLL IC.
Outputs strobe signals to the PLL IC
33 PSTB
(RF unit; IC3, pin 3).
Outputs clock signal to the PLL IC (RF
34 PCK
unit; IC3, pin 4).
Outputs control signal for the UHF
43 UHFC band receiving.
Low: While receiving UHF band.
Outputs the AM bar antenna control
44 ANTSW signal.
High: The AM bar ant. is selected.
Outputs control signal for the WFM
45 WFM circuit.
Low: While receiving WFM mode.
Outputs control signal for the AM cir-
46 AM cuit.
Low: While receiving AM mode.
Input port for the SQL detection noise
47 NOISE
signal.
Description
connected.
Pin Port
number name
48 CHGC
49 TCON
50 AMUTE
51 VHFC
52 PCON
53 +3SC
54 B3C
55 BEEP
58 B2C
59 DBL2
60 DBL1
61 ATT
62 SHIFT
63 HFC
64 B1C
65 800MC
66 300MC
67 GC
68 AFON
4 - 6
Description
Outputs the battery charger circuit
control signal.
High: While the battery is charging.
Outputs control signal for the CTCSS
regulator circuit.
Low: While CTCSS is ON.
Outputs control signal for the AF mute
circuit.
High: While muting.
Outputs control signal for the VHF
band receiving.
Low: While receiving VHF band.
Outputs the power swtich control sig-
nal.
Low: IC-R5 is power ON.
Outputs control signal for +3S and
R3V regulator circuits.
Low: Receiving.
Outputs control signal for the 15–30
MHz receiving.
Low: While receiving 15–30 MHz
band.
Outputs beep audio signals.
Outputs control signal for the 1.9–15
MHz receiving.
Low: While receiving 1.9–15 MHz
band.
Outputs control signal for the LO dou-
bler circuits.
Outputs the attenuator control signal.
Low: While attenuator is ON.
Outputs control signal for the VCO
shift circuit.
Outputs control signal for the 1.9–30
MHz receiving.
Low: While receiving 1.9–30 MHz
band.
Outputs control signal for the 0.5–1.9
MHz receiving.
Low: While receiving 0.5–1.9 MHz
band.
Outputs control signal for the 800 MHz
receiving.
Low: While receiving 800 MHz band.
Outputs control signal for the 300 MHz
receiving.
Low: While receiving 300 MHz band.
Outputs control signal for the 1200
MHz receiving.
Low: While receiving 1200 MHz
band.
Outputs control signal for the AF
amplifier regulator.