Yamaha M7CL-32 Service Manual page 58

M7CL-32/M7CL-48
SIS60000F00A500 (X4834A00) Intelligent Network Controller
PIN
NAME I/O
NO.
1 GPIO15/DTR I/O
2 GPIO14/RTS I/O
3 GPIO13/DSR I/O
4 GPIO12/CTS I/O
General Purpose I/O [15:8]
5 GPIO11/RSV1 I/O
6 GPIO10/MODE I/O
7 GPIO9/TXD I/O
8 GPIO8/RXD I/O
9 V Power supply (–) GND
SS
10 I/O
GPIO7/OSCCTL
11 GPIO6 I/O
12 GPIO5 I/O General Purpose I/O [7:0]
13 GPIO4 I/O
14 GPIO3 I/O
15 GPIO2/CRS I MII Carrier Sense
16 GPIO1 I/O
General Purpose I/O [7:0]
17 GPIO0/INT0 I/O
18 V Built-in logic power supply (+)
DD
19 EP_CS O EEPROM Chip Select
20 EP_SK O EEPROM Serial Clock
21 EP_DI I EEPROM Data In
22 EP_DO O EEPROM Data Out
23 SCL OD/I I C Serial Clock
2
24 SDA OD/I I C Serial Data
2
25 V Power supply (–) GND
SS
26 MII_COL I MII Collision Detect
27 MII_TXD3 O
28 MII_TXD2 O
MII Transmit Data
29 MII_TXD1 O
30 MII_TXD0 O
31 MII_TXEN O MII Transmit Enable
32 V Built-in logic power supply (+)
DD
33 MII_TXCLK I MII Transmit Clock
34 MII_RXER I MII Receive Error
35 MII_RXCLK I MII Receive Clock
36 MII_RXDV I MII Receive Data Valid
37 MII_RXD0 I
38 MII_RXD1 I
MII Receive Data
39 MII_RXD2 I
40 MII_RXD3 I
41 MDC O MII Management Interface Clock
42 MDIO I/O MII Management Interface Data I/O
43 OSC2 O OSC1 clock pin
44 V Built-in logic power supply (+)
DD
45 V Power supply (–) GND
SS
46 OSC1 I OSC1 clock pin
47 V Built-in logic power supply (+)
DD
48 HCS# I
Host Chip Select: It is the host interface access control signal.
49 HA0 I
Host Address: It is the host interface port select signal.
50 HA1 I
AK5385AVF (X5364A00) ADC (Analog to Digital Converter)
PIN
NAME I/O
NO.
1 VREFL I Lch voltage reference input
2 AVSS – Analog ground
3 VCOM O Common voltage output
4 LIN+ I Lch analog positive input
5 LIN– I Lch analog negative input
6 CKS0 I Master clock select 0
7 DVDD – Digital power supply
8 DVSS – Digital ground
9 OVF O Analog input overflow detect
10 PDN I Power down mode
11 DIF I Audio interface format
12 M/S I Master / Slave mode
13 LRCK I/O Output channel clock
14 BICK I/O Audio serial data clock
58
FUNCTION
FUNCTION
PIN
NAME I/O
NO.
51 HA2 I
Host Address: It is the host interface port select signal.
52 VSS Power supply (–) GND
53 HD0 I/O
54 HD1 I/O
55 HD2 I/O
56 HD3 I/O
Host Data: Data signal line of the host interface.
57 HD4 I/O
58 HD5 I/O
59 HD6 I/O
60 HD7 I/O
61 V Built-in logic power supply (+)
DD
62 HD8 I/O
63 HD9 I/O
64 HD10 I/O
65 HD11 I/O
Host Data: Data signal line of the host interface.
66 HD12 I/O
676 HD13 I/O
8 HD14 I/O
69 HD15 I/O
70 V Power supply (–) GND
SS
71 HRD0 I
72 HRD1 I
Host Read/Host Write
73 HWR0 I
74 HWR1 I
75 HINT Tri Host Interrupt
76 Reserve
These pins are reserved for future expansion.
77 Reserve
78 HIFSEL0 I Host Interface Select
79 V Built-in logic power supply (+)
DD
80 PLLC PLL capacitor connecting pin
81 TEST0 I Test Input
82 HIFSEL1 I
Host Interface Select
83 HIFSEL2 I
84 HMUX I Host Bus Multiplex
85 HINTPOL I Host Interrupt Polarity Select
86 TEST1 I Test Input
87 OSC4 O OSC3 clock pin
88 V Power supply (–) GND
SS
89 OSC3 I OSC3 clock pin
90 V Built-in logic power supply (+)
DD
91 RESET I Hardware Reset Input
92 HENDIAN I Host Interface Endian Select
93 HSIZE I Host Bus Size Select
94 OSCO O OSC output pin
95 DSIO I/O
96 DST0 O
97 DST1 O
These pins are used for communication with the debug tool ICD33.
98 DST2 O
99 DPCO O
100 DCLK O
PIN
NAME I/O
NO.
15 SDTO O Audio serial date output
16 CKS1 I Master clock select
17 MCLK I Master clock input
18 DFS0 I Sampling speed select 0
19 HPFE I High pass filter enable
20 DFS1 I Sampling speed select 1
21 BVSS – Substrate ground
22 AVSS – Analog ground
23 AVDD – Analog power supply
24 RIN– I Rch analog negative input
25 RIN+ I Rch analog positive input
26 TEST I Test pin
27 AVSS – Analog ground
28 VREFR I Rch voltage reference input
JK: IC201
FUNCTION
DCMS: IC903
HAAD: IC106, 306, 506, 706
FUNCTION