Cpum (001~004) - Yamaha M7CL-32 Service Manual

H G
BLOCK DIAGRAM 004 (M7CL-32/M7CL-48)
1
CPUM
CR2032 (3V)
2
3
4
5
6 6 28CA1-2000003951-4
F
+3.3D
IC011
Backup
(8P)
controller
3
1
11,33
IC014
IC009 (44P)
(48P)
39,40 14,15
SRAM
CPLD
2Mbit 6 9,17,48
Address
20,22, decode
+3.3D 23,27
IC006 (48P)
19 18
11,26,28
14,37,47
12
FLASH ROM
64Mbit
+3.3D
IC004,005 (54P)
1,3,9,14,
SDRAM
27,43,48
64Mbit X 2 38
+3.3D
IC016 (20P)
20
11-13,17
I2C bus controller
(E-BUS Host)
16,18,19
IC024
7
IC015,
13
IC032
+3.3D
4
BUFFER
IC012
+3.3D
(5P)
IC021-026 5
(20P) RESET
20
E D
3
1
IC010
(8P)
+3.3B
4,9
+3.3D
IC013
(14P)
6,12,
RTC
30,36
3,5,10,11
113,133,
135,136
I/O Port
BUS
+3.3D
L001 237
+3.3A
AVcc
20,31,44,55,66,77,88,
102,117,134,151,190,209
VccQ
IC001
1,37,93,139,157,178,202
Vcc
(5P)
1.9V
REGULATOR
/RESETP
220
CKIO UCLK
219
189
+3.3D
20
15
2-5
17
IC003
16
(20P)
18
BUFFER
X002 X001
3 3
OSC OSC
64MHz 48MHz
System
USB Clock
Clock
CN007
(180P)
CN001
DSP32 (M7CL-32)
(180P)
DSP48 (M7CL-48)
See page 4
C B
238
ADC
DAC
IC002
(240P)
SH3-DSP 7727
CPU :128MHz
BUS : 64MHz
MODE : 7
195,201,
226,227
SCIF
USB Host
I/O Port
+3.3D
BLOCK DIAGRAM 004 (M7CL-32/M7CL-48)
A
M7CL-32/M7CL-48
CPUM