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This appendix gives short description of each of the module's regis-
ters. For more information please refer to the data book for the
STARTECH 16C550 UART chip.
All registers are one byte. Bit 0 is the least significant bit, and bit 7 is
the most significant bit. The address of each register is specified as an
offset from the port base address (BASE), selected with DIP switch
SW1 or SW2.
DLAB is the "Divisor Latch Access Bit", bit 7 of BASE+3.
BASE+0
BASE+0
BASE+0
BASE+1
The two bytes BASE+0 and BASE+1 together form a 16-bit number,
the divisor, which determines the baud rate. Set the divisor as follows:
Baud rate
50
75
110
133.5
150
300
600
1200
1800
2000
18
PCL-740 User's Manual
Receiver buffer register when DLAB=0 and the opera-
tion is a read.
Transmitter holding register when DLAB=0 and the
operation is a write.
Divisor latch bits 0 - 7 when DLAB=1.
Divisor latch bits 8 - 15 when DLAB=1.
Divisor
2304
1536
1047
857
768
384
192
96
64
58
Baud rate
Divisor
2400
48
3600
32
4800
24
7200
16
9600
12
19200
6
38400
3
56000
2
115200
1
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