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Board Level Hardware Description
1
For this reason, software should only use 32-bit write transfers. This memory
is controlled by the BusSwitch, and the memory size, access time, and write
enable capability can be programmed via the ROM Control Register (ROMCR)
in the BusSwitch. The flash memory can be accessed from the processor bus
only. It is not accessible from the local peripheral bus or VMEbus.
Onboard DRAM
The onboard DRAM on the MVME197DP/SP (2 banks of 128MB memory, one
optionally installed) is sized at 128MB using 4M x 4 devices and configured as
256 bits wide.
The DRAM is four-way interleaved to efficiently support cache burst cycles.
The DRAM is controlled by the DCAM and ECDM, and the map decoders in
the DCAM can be programmed through the I
accommodate different base address(es) and sizes. The onboard DRAM is not
disabled by a local peripheral bus reset. Refer to the DCAM and ECDM
chapters in the MVME197LE, MVME197DP, and MVME197SP Single Board
Computers Programmer's Reference Guide for detailed programming
information.
Battery Backup RAM and Clock
The MK48T08 RAM and clock chip is used on the MVME197. This chip
provides a time of day clock, oscillator, crystal, power fail detection, memory
write protection, 8KB of RAM, and a battery in one 28-pin package. The clock
provides seconds, minutes, hours, day, date, month, and year in BCD 24-hour
format. Corrections for 28-, 29-, (leap year) and 30-day months are
automatically made. No interrupts are generated by the clock. The MK48T08
is an 8-bit device; however the interface provided by the PCCchip2 supports
8-, 16-, and 32-bit accesses to the MK48T08. Refer to the PCCchip2 chapter in
the MVME197LE, MVME197DP, and MVME197SP Single Board Computers
Programmer's Reference Guide and to the MK48T08 data sheet for detailed
programming information.
VMEbus Interface
The local peripheral bus to VMEbus interface, the VMEbus to local peripheral
bus interface, and the local-VMEbus DMA controller functions on the
MVME197 are provided by the VMEchip2. The VMEchip2 can also provide
the VMEbus system controller functions. Refer to the VMEchip2 chapter in the
MVME197LE, MVME197DP, and MVME197SP Single Board Computers
Programmer's Reference Guide for detailed programming information.
1-10
2
C bus interface in the ECDM to
MVME197IG/D1A1
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