Sony PMW-EX30 Service Manual page 110

Solid-state memory recorder
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IC100 (4/7)
CXD9211CGG
1
AR10
DP_B_DDR_DM7
B_DDR_DM7
AR12
DP_B_DDR_DM6
B_DDR_DM6
AR5
DP_B_DDR_DM5
B_DDR_DM5
DP_B_DDR_DM4
AR8
B_DDR_DM4
AG1
DP_B_DDR_DM3
B_DDR_DM3
DP_B_DDR_DM2
AD1
B_DDR_DM2
AB1
DP_B_DDR_DM1
B_DDR_DM1
W1
DP_B_DDR_DM0
B_DDR_DM0
AR11
DP_B_DDR_DQS7
B_DDR_DQS7
DP_B_DDR_DQS6
AR13
B_DDR_DQS6
AR4
DP_B_DDR_DQS5
B_DDR_DQS5
AR7
DP_B_DDR_DQS4
B_DDR_DQS4
AH1
DP_B_DDR_DQS3
B_DDR_DQS3
AE1
DP_B_DDR_DQS2
B_DDR_DQS2
AA1
DP_B_DDR_DQS1
B_DDR_DQS1
V1
DP_B_DDR_DQS0
B_DDR_DQS0
DP_O_DDR_ADDR12
AK3
O_DDR_ADDR12
AL2
DP_O_DDR_ADDR11
O_DDR_ADDR11
2
DP_O_DDR_ADDR10
AJ3
O_DDR_ADDR10
DP_O_DDR_ADDR9
AL3
O_DDR_ADDR9
AM3
DP_O_DDR_ADDR8
O_DDR_ADDR8
DP_O_DDR_ADDR7
AN1
O_DDR_ADDR7
AN2
DP_O_DDR_ADDR6
O_DDR_ADDR6
DP_O_DDR_ADDR5
AP1
O_DDR_ADDR5
AN3
DP_+2.5V
DP_O_DDR_ADDR4
O_DDR_ADDR4
DP_O_DDR_ADDR3
AF3
O_DDR_ADDR3
AK2
DP_O_DDR_ADDR2
O_DDR_ADDR2
AF2
FB300
DP_O_DDR_ADDR1
X300
O_DDR_ADDR1
54MHz
DP_O_DDR_ADDR0
AH2
O_DDR_ADDR0
4
VDD
R300
AL20
1
3
C300
10
OE
OUT
I_CLK_DDR
0.1uF
GND
AR3
DP_O_DDR_CLK1
O_DDR_CLK1
2
DP_O_DDR_CLK0
AL1
O_DDR_CLK0
AG3
DP_O_DDR_BA0
O_DDR_BA0
GND
AE3
DP_O_DDR_BA1
O_DDR_BA1
AG2
DP_O_DDR_CAS
O_DDR_CAS
AM2
DP_O_DDR_CKE
O_DDR_CKE
DP_O_DDR_CLKN1
AR2
O_DDR_CLKN1
AK1
DP_O_DDR_CLKN0
O_DDR_CLKN0
AJ2
DP_O_DDR_CS
O_DDR_CS
AE2
DP_O_DDR_RAS
3
O_DDR_RAS
AH3
T-ONE
DP_O_DDR_WE
O_DDR_WE
FB301
M-DDR
DP_+1.8V
C301
10uF
AK18
VDDE18_33
AK16
C302
0.1uF
VDDE18_32
AK14
VDDE18_31
AK12
VDDE18_30
AK10
C303
VDDE18_29
0.1uF
AK8
VDDE18_28
AK6
VDDE18_27
AJ17
VDDE18_26
AJ15
C304
VDDE18_25
0.1uF
AJ11
VDDE18_24
AJ9
VDDE18_23
AJ7
VDDE18_22
AH6
C305
0.1uF
VDDE18_21
AG7
VDDE18_20
AF6
VDDE18_19
AE7
VDDE18_18
AD6
C306
0.1uF
VDDE18_17
AB6
VDDE18_16
AA7
VDDE18_15
Y6
VDDE18_14
W7
C307
VDDE18_13
0.1uF
V6
VDDE18_12
U6
4
VDDE18_11
T7
VDDE18_10
R6
C308
VDDE18_9
0.1uF
N6
VDDE18_8
M7
C309
VDDE18_7
0.1uF
GND
DP_+1.1V_TONE
FB302
C310
AJ18
10uF
VDDI12_22
AJ13
VDDI12_21
AJ10
C311
VDDI12_20
0.1uF
AH7
VDDI12_19
AC7
VDDI12_17
V7
VDDI12_15
P7
C312
VDDI12_14
0.1uF
GND
5
A
B
DPR-297 (3/12)
C315
C319
C323
0.1uF
0.1uF
0.1uF
AL14
C313
C317
C321
C325
DP_B_DDR_DATA63
DP_+1.8V
22uF
0.1uF
0.1uF
0.1uF
B_DDR_DATA63
AL13
DP_B_DDR_DATA62
B_DDR_DATA62
AL12
GND
DP_B_DDR_DATA61
B_DDR_DATA61
AL11
DP_B_DDR_DATA60
B_DDR_DATA60
FB303
AL10
DP_B_DDR_DATA59
B_DDR_DATA59
AL9
DP_B_DDR_DATA58
B_DDR_DATA58
AL8
DP_B_DDR_DATA57
B_DDR_DATA57
AL7
H9
DP_B_DDR_DATA56
DP_O_DDR_BA1
B_DDR_DATA56
BA1
AN11
H8
DP_B_DDR_DATA55
DP_O_DDR_BA0
B_DDR_DATA55
BA0
AP11
H3
DP_B_DDR_DATA54
DP_O_DDR_ADDR12
B_DDR_DATA54
A12
AN12
DP_B_DDR_DATA53
DP_O_DDR_ADDR11
H2
B_DDR_DATA53
A11
AP12
J7
DP_B_DDR_DATA52
DP_O_DDR_ADDR10
B_DDR_DATA52
A10
AN13
DP_B_DDR_DATA51
DP_O_DDR_ADDR9
H1
B_DDR_DATA51
A9
AP13
J3
DP_B_DDR_DATA50
DP_O_DDR_ADDR8
B_DDR_DATA50
A8
AN14
J2
DP_B_DDR_DATA49
DP_O_DDR_ADDR7
B_DDR_DATA49
A7
AP14
J1
DP_B_DDR_DATA48
DP_O_DDR_ADDR6
B_DDR_DATA48
A6
AP2
K3
DP_B_DDR_DATA47
DP_O_DDR_ADDR5
B_DDR_DATA47
A5
AP3
K1
DP_B_DDR_DATA46
DP_O_DDR_ADDR4
B_DDR_DATA46
A4
AN4
K9
DP_B_DDR_DATA45
DP_O_DDR_ADDR3
B_DDR_DATA45
A3
IC300
HY5MS7B2BLFP-6EDR-C
AP4
DP_B_DDR_DATA44
DP_O_DDR_ADDR2
K7
B_DDR_DATA44
A2
AN5
J9
DP_B_DDR_DATA43
DP_O_DDR_ADDR1
B_DDR_DATA43
A1
T-ONE
AP5
DP_B_DDR_DATA42
DP_O_DDR_ADDR0
J8
B_DDR_DATA42
A0
M_DDR_1
AN6
DP_B_DDR_DATA41
B_DDR_DATA41
AP6
H7
DP_B_DDR_DATA40
DP_O_DDR_CS
B_DDR_DATA40
CS
AP10
G7
DP_B_DDR_DATA39
DP_O_DDR_WE
B_DDR_DATA39
WE
AN10
G8
DP_B_DDR_DATA38
DP_O_DDR_CAS
B_DDR_DATA38
CAS
AP9
DP_B_DDR_DATA37
DP_O_DDR_RAS
G9
B_DDR_DATA37
RAS
AN9
F2
DP_B_DDR_DATA36
DP_B_DDR_DM7
B_DDR_DATA36
DM3
AP8
DP_B_DDR_DATA35
DP_B_DDR_DM6
F8
B_DDR_DATA35
DM2
AN8
K2
DP_B_DDR_DATA34
DP_B_DDR_DM5
B_DDR_DATA34
DM1
AP7
K8
DP_B_DDR_DATA33
DP_B_DDR_DM4
B_DDR_DATA33
DM0
AN7
E2
DP_B_DDR_DATA32
DP_B_DDR_DQS7
B_DDR_DATA32
DQS3
AL6
E8
DP_B_DDR_DATA31
DP_B_DDR_DQS6
B_DDR_DATA31
DQS2
AL5
L2
DP_B_DDR_DATA30
DP_B_DDR_DQS5
B_DDR_DATA30
DQS1
AK5
L8
DP_B_DDR_DATA29
DP_B_DDR_DQS4
B_DDR_DATA29
DQS0
AJ5
DP_B_DDR_DATA28
DP_O_DDR_CKE
G1
B_DDR_DATA28
CKE
AH5
G2
DP_B_DDR_DATA27
DP_O_DDR_CLK1
B_DDR_DATA27
CK
AG5
G3
DP_B_DDR_DATA26
DP_O_DDR_CLKN1
B_DDR_DATA26
CK
AF5
DP_B_DDR_DATA25
B_DDR_DATA25
AE5
F3
DP_B_DDR_DATA24
B_DDR_DATA24
NC1
AA2
F7
DP_B_DDR_DATA23
B_DDR_DATA23
NC2
AA3
DP_B_DDR_DATA22
B_DDR_DATA22
AB2
DP_B_DDR_DATA21
B_DDR_DATA21
AB3
DP_B_DDR_DATA20
B_DDR_DATA20
AC2
DP_B_DDR_DATA19
B_DDR_DATA19
AC3
DP_B_DDR_DATA18
B_DDR_DATA18
AD2
DP_B_DDR_DATA17
B_DDR_DATA17
AD3
DP_B_DDR_DATA16
B_DDR_DATA16
U5
DP_B_DDR_DATA15
B_DDR_DATA15
V5
DP_B_DDR_DATA14
B_DDR_DATA14
W5
DP_B_DDR_DATA13
B_DDR_DATA13
Y5
DP_B_DDR_DATA12
B_DDR_DATA12
AA5
DP_B_DDR_DATA11
C320
B_DDR_DATA11
C316
C324
AB5
0.1uF
0.1uF
0.1uF
DP_B_DDR_DATA10
B_DDR_DATA10
C314
C318
C322
C326
AC5
DP_B_DDR_DATA9
DP_+1.8V
22uF
0.1uF
0.1uF
0.1uF
B_DDR_DATA9
AD5
DP_B_DDR_DATA8
B_DDR_DATA8
GND
Y3
DP_B_DDR_DATA7
B_DDR_DATA7
Y2
DP_B_DDR_DATA6
B_DDR_DATA6
FB304
W3
DP_B_DDR_DATA5
B_DDR_DATA5
W2
DP_B_DDR_DATA4
B_DDR_DATA4
V3
DP_B_DDR_DATA3
B_DDR_DATA3
V2
H9
DP_B_DDR_DATA2
DP_O_DDR_BA1
B_DDR_DATA2
BA1
U3
H8
DP_B_DDR_DATA1
DP_O_DDR_BA0
B_DDR_DATA1
BA0
U2
H3
DP_B_DDR_DATA0
DP_O_DDR_ADDR12
B_DDR_DATA0
A12
H2
DP_O_DDR_ADDR11
A11
M6
DP_O_DDR_ADDR10
J7
VSS35
A10
N7
H1
DP_O_DDR_ADDR9
VSS37
A9
P6
DP_O_DDR_ADDR8
J3
VSS39
A8
R7
J2
DP_O_DDR_ADDR7
VSS41
A7
T1
J1
DP_O_DDR_ADDR6
VSS42
A6
T6
K3
DP_O_DDR_ADDR5
VSS43
A5
U1
K1
DP_O_DDR_ADDR4
VSS45
A4
U7
K9
DP_O_DDR_ADDR3
IC301
VSS46
A3
HY5MS7B2BLFP-6EDR-C
W6
K7
DP_O_DDR_ADDR2
VSS48
A2
Y1
DP_O_DDR_ADDR1
J9
VSS50
A1
T-ONE
Y7
J8
DP_O_DDR_ADDR0
VSS51
A0
M_DDR_0
AA6
VSS53
AB7
H7
DP_O_DDR_CS
VSS54
CS
AC1
G7
DP_O_DDR_WE
VSS55
WE
AC6
G8
DP_O_DDR_CAS
VSS56
CAS
AD7
G9
DP_O_DDR_RAS
VSS57
RAS
AE6
DP_B_DDR_DM3
F2
VSS59
DM3
AF1
F8
DP_B_DDR_DM2
VSS61
DM2
AF7
DP_B_DDR_DM1
K2
VSS62
DM1
AG6
K8
DP_B_DDR_DM0
VSS64
DM0
AJ1
E2
DP_B_DDR_DQS3
VSS67
DQS3
AJ6
E8
DP_B_DDR_DQS2
VSS68
DQS2
AJ8
L2
DP_B_DDR_DQS1
VSS69
DQS1
AJ12
L8
DP_B_DDR_DQS0
VSS70
DQS0
AJ14
G1
DP_O_DDR_CKE
VSS71
CKE
AJ16
DP_O_DDR_CLK0
G2
VSS72
CK
AK7
G3
DP_O_DDR_CLKN0
VSS79
CK
AK9
VSS80
AK11
F3
VSS81
NC1
AK13
F7
VSS82
NC2
AK15
VSS83
AK17
VSS84
AK19
VSS85
AM1
VSS92
AR1
VSS94
AR6
VSS95
AR9
VSS96
AR14
VSS97
GND
C
DPR-297 (3/12)
SUFFIX: -11
SUFFIX: -11
C327
0.1uF
A2
DP_B_DDR_DATA63
DQ31
B3
DP_B_DDR_DATA62
DQ30
B2
DP_B_DDR_DATA61
DQ29
C3
DP_B_DDR_DATA60
DQ28
C2
DP_B_DDR_DATA59
DQ27
D3
DP_B_DDR_DATA58
DQ26
012
DP_DBG_SER
D2
DP_B_DDR_DATA57
DQ25
E3
DP_B_DDR_DATA56
DQ24
E7
DP_B_DDR_DATA55
DQ23
D8
DP_B_DDR_DATA54
DQ22
D7
DP_B_DDR_DATA53
DQ21
C8
DP_B_DDR_DATA52
DQ20
C7
DP_B_DDR_DATA51
DQ19
B8
From AVP(MELON)
DP_B_DDR_DATA50
DQ18
B7
DP_B_DDR_DATA49
DQ17
011
DP_SYS_RESET
A8
DP_B_DDR_DATA48
DQ16
012
ICE_TONE
R2
DP_B_DDR_DATA47
DP_I_BS_SRST
DQ15
P3
DP_B_DDR_DATA46
DQ14
P2
DP_B_DDR_DATA45
DQ13
N3
DP_B_DDR_DATA44
DQ12
N2
DP_B_DDR_DATA43
DQ11
M3
DP_B_DDR_DATA42
DQ10
M2
DP_I_BS_TMS
DP_B_DDR_DATA41
DQ9
L3
DP_B_DDR_DATA40
DP_I_BS_TRST
DQ8
L7
DP_I_BS_TCK
DP_B_DDR_DATA39
DQ7
M8
DP_B_DDR_DATA38
DP_I_BS_TDI
DQ6
M7
DP_O_BS_TDO
DP_B_DDR_DATA37
DQ5
N8
DP_B_DDR_DATA36
DQ4
N7
DP_B_DDR_DATA35
S300
DQ3
P8
DP_B_DDR_DATA34
DQ2
P7
DP_B_DDR_DATA33
DQ1
R8
DP_B_DDR_DATA32
DQ0
GND
C328
0.1uF
A2
DP_B_DDR_DATA31
DQ31
B3
DP_B_DDR_DATA30
DQ30
B2
DP_B_DDR_DATA29
DQ29
C3
DP_B_DDR_DATA28
DQ28
C2
DP_B_DDR_DATA27
DQ27
D3
DP_B_DDR_DATA26
DQ26
D2
DP_B_DDR_DATA25
DQ25
E3
DP_B_DDR_DATA24
DQ24
E7
DP_B_DDR_DATA23
DQ23
DP_O_BS_RTCK
D8
DP_B_DDR_DATA22
DQ22
D7
DP_B_DDR_DATA21
DQ21
C8
DP_B_DDR_DATA20
DQ20
C7
DP_B_DDR_DATA19
DQ19
B8
DP_B_DDR_DATA18
DQ18
B7
DP_B_DDR_DATA17
DQ17
A8
DP_B_DDR_DATA16
DQ16
R2
DP_B_DDR_DATA15
DQ15
P3
DP_B_DDR_DATA14
DQ14
P2
DP_B_DDR_DATA13
DQ13
N3
DP_B_DDR_DATA12
DQ12
N2
DP_B_DDR_DATA11
DQ11
M3
DP_B_DDR_DATA10
DQ10
M2
DP_B_DDR_DATA9
DQ9
L3
DP_B_DDR_DATA8
DQ8
L7
DP_B_DDR_DATA7
DQ7
M8
DP_B_DDR_DATA6
DQ6
M7
DP_B_DDR_DATA5
DQ5
N8
DP_B_DDR_DATA4
DQ4
N7
DP_B_DDR_DATA3
DQ3
P8
DP_B_DDR_DATA2
DQ2
P7
DP_B_DDR_DATA1
DQ1
R8
DP_B_DDR_DATA0
DQ0
GND
6-32
6-32
D
E
AL28
AL25
C336
0.001uF
I_TESTMODE2
I_CLK_VGA
AN26
AC35
I_TESTMODE1
I_DA_Y_VREF
AL26
AC34
R305
I_TESTMODE0
O_DA_Y_VRO
2.7k
AP21
AC33
GND
I_VPDI
O_DA_Y_COMP
AP22
AC31
I_USER_TEST
O_DA_Y
C337
GND
AP23
AB35
0.01uF
I_ARM_JTAG_MODE
O_DA_Y_OFT
GND
DP_+2.5V
C338
0.001uF
AR20
A_PLL_DDRRST
AA33
AR30
I_DA_PR_VREF
R302
10k
A_PLL_OTHERRST
AA31
R306
AN29
O_DA_PR_VRO
I_SYS_XRST
Y35
2.7k
GND
AN28
O_DA_PR_COMP
A_PLL_LPF
Y34
AL22
O_DA_PR
C339
I_GLOBAL_RST[I_BS_nSRST]
Y33
0.01uF
O_DA_PR_OFT
DP_+2.5V
A1
DP_O_DBG_SO
O_DBG_SO
GND
D2
DP_O_DBG_SI
C340
0.001uF
I_DBG_SI
AB34
R303
R301
R304
10k
10k
I_DA_PB_VREF
560
R307
NM
AB33
O_DA_PB_VRO
B1
AB31
2.7k
GND
I_BS_TMS
O_DA_PB_COMP
C1
AA35
I_BS_TRST
O_DA_PB
C341
C2
AA34
0.01uF
I_BS_TCK
O_DA_PB_OFT
C3
GND
I_BS_TDI
D1
C35
O_BS_TDO
B_SDI_IIC_SDA
B35
B_SDI_IIC_CLK
R310
F34
0
O_VGA_VSYNC[O_BS_RTCK]
NM
C331
C335
F33
330pF
O_VGA_HSYNC
0.033uF
AR25
AC29
A_PLL_AVD12_6
I_DA_AVDD3
GND
GND
AR23
AB29
A_PLL_AVD12_5
I_DA_AVDD2
AR21
AA29
A_PLL_AVD12_4
I_DA_AVDD1
AP29
A_PLL_AVD12_3
DP_+1.1V_TONE
C344
AP25
AC30
0.1uF
A_PLL_AVD12_2
I_DA_AVSS3
FB305
A10
AB30
A_PLL_AVD12_1
I_DA_AVSS2
AA30
I_DA_AVSS1
T-ONE
C329
C330
C333
G35
10uF
0.1uF
0.1uF
PLL/JTAG/AVDD
O_D_SCLK
G34
O_D_SCS
G33
AR29
A_PLL_AVS6
O_D_STX
AR26
G31
A_PLL_AVS5
I_D_SRX
GND
AR24
A_PLL_AVS4
AR22
A_PLL_AVS3
AP26
A_PLL_AVS2
G28
I_SVBS_DA_AVSS3
A9
A_PLL_AVS1
G27
I_SVBS_DA_AVSS2
G26
I_SVBS_DA_AVSS1
GND
F28
C345
I_SVBS_DA_AVDD3
0.1uF
F27
I_SVBS_DA_AVDD2
F26
I_SVBS_DA_AVDD1
AP28
E27
A_PLL_AVS_2
O_S_Y
AR28
E26
A_PLL_AVS_1
O_S_C
GND
C27
C332
C334
O_VBS_VRO
DP_+3.1V
10uF
0.1uF
AP27
B27
GND
A_PLL_AVD33_2
I_VBS_VREF
AR27
B26
A_PLL_AVD33_1
O_YC_VRO
FB306
A27
O_VBS
A26
I_YC_VREF
IC100
(3/7)
GND
CXD9211CGG
F
G
To CP
<-
R311
0
DP_O_DA_Y
011
R312
0
DP_O_DA_PR
011
R313
0
DP_O_DA_PB
011
DP_+3.1V
C348
0.1uF
DP_VREF_+1.1V
<-
C351
0.1uF
GND
DP_+3.1V
C349
0.1uF
<-
DP_+3.1V
C350
0.1uF
<-
DP_+3.1V
FB307
C346
1uF
GND
GND
C347
1uF
DP_+3.1V
FB308
To CP
R314
0
DP_O_S_Y
011
C342
R315
0.001uF
0
DP_O_S_C
011
R308
2.7k
To CP
R309
2.7k
R316
0
DP_O_VBS
011
DP_VREF_+1.1V
C343
0.001uF
C352
0.1uF
DP_VREF_+1.1V
GND
C353
0.1uF
GND
PMW-EX30
H

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