Onkyo HT-R960 Service Manual page 49

7.1-ch home theater receiver
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-18
Q7003 : M66005-0001AHP (FL Tube Driver)
BLOCK DIAGRAM
CS
14
Serial
SCK
receive
15
circuit
SDATA
16
XIN
21
Clock
generator
XOUT
20
13
RESET
Vcc1
19
Vcc2
60
Vss
22
Vp
32
TERMINAL DESCRIPTION
PIN NO.
SYMBOL
13
RESET
14
CS
15
SCK
16
SDATA
21,
XIN,
20
XOUT
1~12
DIG00 ~
61~64
DIG15
23~31
SEG00 ~
33~59
SEG39
17, 18
P0, P1
19
VCC1
60
VCC2
22
VSS
32
VP
Display code RAM
Bank 1 : 8bit x 16
Bank 2 : 8bit x 64
code
write
dot data
write
Code/
data
command
control
circuit
code
select
timing
Display
clock
controller
PIN NAME
DESCRIPTION
Reset input
This pin is used to initialize the internal state of the M66004.
"L" : Communication with the MCU is possible.
Chip select input
"H" : Any instruction from the MCU is neglected.
Shift clock input
At the rising edge from "L" to "H", input data is shifted.
Serial data input
Character code or command data to display is input from MSB.
Clock input
This pin is used to connect a resister and a capacitor externally to
Clock output
set oscillation frequency.
Digit output
These pins are used to connect to digit pins of VFD.
Segment output
These pins are used to connect to segment pins of VFD.
---
Output port (static operation)
---
Positive power supply for internal logic.
---
Positive power supply for high-pressure-resistant output port.
---
GND
---
Negative power supply for VFD drive.
CG ROM
(35bit x 160)
Segment
output
circuit
CG RAM
(35bit x 16)
Segment/
Digit
select/
output
circuit
scan pulse
Digit
output
circuit
2
TX-SR606
59
SEG00
33
SEG26
31
SEG27
24 SEG34
SEG35
23
64
DIG12/SEG36
63
DIG13/SEG37
62
DIG14/SEG38
61
DIG15/SEG39
12
DIG00
1
DIG11
P0
18
P1
17

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