Onkyo HT-R960 Service Manual page 38

7.1-ch home theater receiver
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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-7
Q282
: ES29LV160ET-70TG ( 16Mbit CMOS 3.0 Volt-only, Boot Sector Flash Memory )
BLOCK DIAGRAM
Vcc
Vcc Detector
Vss
WE#
Command
Register
RESET#
A<0:19>
CE#
OE#
Output Enable
BYTE#
PIN LAYOUT
WE#
RESET#
RY/BY#
TERMINAL DESCRIPTION
Pin Name
Description
A0-A19
20 Addresses
DQ0-DQ14
15 Data Inputs/Outputs
DQ15/A-1
DQ15 (Data Input/Output, Word Mode) / A-1 (LSB Address Input, Byte Mode)
CE#
Chip Enable
OE#
Output Enable
WE#
Write Enable
RESET#
Hardware Reset Pin, Active Low
BYTE#
Selects 8-bit or 16-bit mode
RY/BY#
Ready/Busy Output (N/A SO 044)
Vcc
3.0 volt-only single power supply
Vss
Device Ground
NC
Pin Not Connected Internally
RY/BY#
Timer/
Counter
Write
State
Machine
Sector Switches
Chip Enable
Logic
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
NC
10
11
48-Pin Standard TSOP
12
NC
13
ES29LV160
NC
14
15
A18
16
A17
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
Analog Bias
Generator
Y-Decoder
X-Decoder
48
A16
47
BYTE#
46
Vss
45
DQ15/A-1
44
DQ7
43
DQ14
42
DQ6
41
DQ13
40
DQ5
39
DQ12
38
DQ4
37
Vcc
36
DQ11
35
DQ3
34
DQ10
33
DQ2
32
DQ9
31
DQ1
30
DQ8
29
DQ0
28
OE#
27
Vss
26
CE#
25
A0
TX-SR606
DQ0-DQ15(A-1)
Input/Output
Buffers
Data Latch/
Sense Amps
Y-Decoder
Cell Array

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