Internal Communication Bus - Epson PhotoPC 850Z Service Manual

EPSON PhotoPC 850Z
Table 2-3. 8-bit Microprocessor Port Specification (Continued)
Pin Signal Name I/O
90 BARRIER SW1 I Barrier position detection signal
91-94 SCAN OUT 0-3 O Key matrix output
95 LCD ON O DC/DC converter (LCD system) On/Off sig., H:On
96 /ASIC TEST O ASIC control signal
97 /ASIC RESET O ASIC reset signal
98 /MAIN RESET O SPARC reset signal,
99 AVSS - Analog GND input terminal
100 BATTERY I Battery voltage input (analog input)
Operating Principles
Outline
L: Reset Output
Operating Principles of Circuit Boards

2.2.5.2 Internal Communication Bus

The SY1 circuit board carries out overall control of camera operation by
detecting the input from the keyboard and the condition of the camera circuits.
The 8-bit microprocessor reads the signals from each sensor element as input
data and outputs this data to the camera circuits (ASIC) or to the LCD display
device as operation mode setting data. The figure below shows the internal
communication between the 8-bit microprocessor, ASIC, and SPARC lite
circuits.
8-bit
Microprocessor
Figure 2-12. Internal Bus Communication System
Revision A
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