Powerspan Processor Bus Registers - Interphase 4538 Hardware Reference Manual

The PCI Bridge
Offset

PowerSpan Processor Bus Registers

These registers are used to define the parameters of the local to PCI windows. They are
mapped in the PCI memory space (base address defined in PCI configuration register 0x14
PCIBAR1) and in the local space for the local processor (base address 0xF0020000).
Offset Register
16
Table 1-16. PowerSpan PCI Registers (cont)
Register Description
Table 1-17. PowerSpan Processor Bus Registers
Description
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