Appendix E – How To Handle The Dac; Table 37: Individual Control Parameters - Photon Focus MV-D752-28 User Manual

Cmos area scan camera
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17 Appendix E – How to handle the DAC?
The camera is trimmed by the digital-analog-converter (DAC). The DAC can be directly
programmed via the RS232 interface of the camera. During reset or power up, the DAC
receives the data stored in the configuration EEPROM. The RS232 interface requires
transmitting a double byte (16bit value), where the LSB has to be written in the register
address 08H and the MSB in the register 09H of the camera. After the MSB transmission
the DAC is automatically addressed. It is not possible to read back any settings
from the DAC.
The DAC properties are determined by the system register (system control) where the
properties of each single channel can be specified by channel register (channel control).
Every DAC channel has a main register and a sub register. The main register value is a
rough or coarse adjustment of the DAC output voltage and the sub register value is a fine
adjustment of the same DAC output voltage.
The individual control parameters are shown in the Table 37.

Table 37: Individual control parameters

BIT:
15
14
13
System-
X
0
0
control
Channel-
X
1
0
control
Main-
0
X
1
Register
Sub -
1
X
1
Register
BIN:
coding method
PD:
Power Down
SSTBY:
System Stand by (1= Stand by)
SCLR:
System Clear
STBY:
Channel Standby (0 = Stand by)
CLR:
Software Clear
A2..A0:
addresses for selecting the channel (0..7)
DB9..DB0:
data for rough and fine adjustment
MX1, MX0:
Selection of the reference source
0:
logical state 0
1:
logical state 1
X:
arbitrary logical state
The system register and the channel register are preprogrammed according to the
factory settings after power up or reset of the camera and should not be changed. Any
changes of these values lead to malfunctions of the camera and can also damage the
CMOS sensor. Table 38 shows the factory settings of the system and the channel
register and their function.
REV: 1.0
12
11
10
9
8
X
X
X
X
X
A2
A1
A0
MX1
MX0
A2
A1
A0
DB9
DB8
A2
A1
A0
DB7
DB6
(0 = two's compliment or 1 = binary with offset)
(0 = Power Down)
(1 = deletes the DAC Outputs)
(1 = Clear)
00: Vbias= VDD/2 = 1.65V
01: Vbias= internal reference Vref = 1.23V
10: Vbias= external reference Vref = 1.25V
11: not determined
MV-D752-28 User's Manual
7
6
5
4
0
BIN
PD
SSTBY
X
X
X
STBY
DB7
DB6
DB5
DB4
DB5
DB4
DB3
DB2
3
2
1
0
SCLR
0
X
X
CLR
0
X
X
DB3
DB2
DB1
DB0
DB1
DB0
X
X
Page 49/61

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