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XV-N50BK,XV-N55SL
Pin No.
Symbol
34
NCS
35
NWR
36
NRD
37~44
CPUDT7~0
45
CLKOUT1
46
MMOD
47
NRST
48
MSTPOL
49
SCLOCK
50
SDATA
51
OFTR
52
BDO
53
SDOUT
54
CPSCK
55
FEPEN
56
PWM4
57
VDD3
58
DRAMVDD18
59
DRAMVSS
60
VSS
61
WOBBLEFIL
62
PWM6
63
PWM7
64
PWM8
65
TBAL
66
FBAL
67
TRSDRV
68
SPDRV
69
FG
70
TILTP
71
TILT
72
TILTN
73
TX
74
DTRD
75
IDGT
76
VDD18
77
VSS
78
VDD3
79
OSCI1
80
OSCO1
81
VSS
82
TSTSG
83
VFOSHORT
84
JLINE
85
AVSS
86
ROUT
1-34 (No.A0041)
I/O
I
System control chip select
I
Writing system control
I
Read signal input from system controller
I/O System control data
-
Non connect
I
Test mode switch signal
I
System reset
I
Master terminal polarity switch input
-
Non connect
-
Non connect
I
Off track signal input
I
Drop out signal input
I/O Serial data input/output terminal
O
Clock output for serial data
O
Front end processor serial enable signal output
I
Traverse mechanism inner circumference detect switch
-
Power supply terminal for I/O (3.3V)
-
Power supply terminal for DRAM (1.8V)
-
Connect to ground for DRAM
-
Connect to ground
-
Non connect
O
Connect to pick up unit
O
Short brake terminal
-
Non connect
O
Tracking balance adjustment output
O
Focus balance adjustment output
O
Traverse drive output
O
Spindle drive output
I
Motor FG input
-
Non connect
-
Non connect
-
Non connect
O
Digital output signal
-
Non connect
-
Non connect
-
Power supply terminal for I/O (1.8V)
-
Connect to ground
-
Power supply terminal for I/O (3.3V)
I
Oscillation input 16.9MHz
O
Oscillation output 16.9MHz
-
Connect to ground
O
Calibration signal
O
VFO short output
O
J-line setting output
-
Connect to ground for analog circuit
-
Non connect
Description
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