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4.3 AN8708FHK(IC101):Frontend processor
• Pin layout
48
1
12
13
• Pin function
Pin No.
Symbol
1
GND1
2
LPC1
3
LPC01
4
LPC2
5
LPC02
6
FBAL
7
TBAL
8
POFLT
9
SEN
10
SCK
11
STDI
12
VRE18
13
TE
14
VSS
15
OFTR
16
BDO
17
VDD
18
RSCL
19
GND2
20
FE
21
FS
22
VHALF
23
MIRSL
24
BDOSL
25
VCC2
26
FLTOP
27
FLTON
28
SAG
29
DCAGC
30
AGCG
31
TESTSG
32
RFINP
33
RFINN
34
DCRF
35
PEAK
36
RFENV
37
VCC1
38,39
VIN5,6
40,41
VIN7,8
42
VREF
43~46
VIN1~4
47,48
VIN9,10
37
36
25
24
I/O
-
Connect to ground
I
Laser input terminal (DVD)
O
Laser drive output terminal (DVD)
I
Laser input terminal (CD)
O
Laser drive output terminal (CD)
I
Focus balance control terminal
I
Tracking balance control terminal
O
Track detection filter terminal
I
SEN (Serial data input terminal)
I
SCK (Serial data input terminal)
I/O STDI (Serial data input/output terminal)
-
RF Standard voltage filter
O
Tracking error signal output terminal
-
Connect to ground
O
OFTR output
O
BDO output
-
Power supply terminal 3 (3.3V)
-
Source terminal of standard current
-
Connect to ground
O
Focus error signal output terminal
O
Focus addition signal output terminal
O
VHALF Voltage output terminal
O
MIRROR Slow envelope detection terminal
O
BDO Slow envelope detection terminal
-
Power supply terminal 2 (3.3V)
O
Filter amplifier positive output terminal
O
Filter amplifier negative output terminal
O
SAG Cancel detention terminal
O
FLT-DC Cut filter terminal
O
AGC Amp.gain control terminal
I
TEST signal input terminal
I
RF signal positive input terminal
I
RF signal negative input terminal
O
Filter terminal for RF all addition AMP.DC cut
O
Peak envelope detection filter terminal
O
RF Envelope output terminal
-
Power supply terminal 2 (5V)
I
Internal four division (CD) RF input terminal 1,2
I
External two division (DVD) RF input terminal 1,2
-
VREF Voltage output terminal
I
Internal four division (DVD) RF input terminal 1~4
I
Three beam sub (CD) input terminal 1,2
Description
XV-N50BK,XV-N55SL
(No.A0041)1-27
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