JVC XV-N50BK Service Manual page 33

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4.8 MN103S26EDC-H (IC301) : Super optical disc controller
• Terminal layout
176
1
44
45
• Block diagram
Analog
Servo I/O
(core 1 I/O)
Servo core
(core 2)
RAM
CIRC
• Pin function
Pin No.
Symbol
1,2
NINT0,1
3
VDD3
4
VSS
5
NINT2
6
WAITDOC
7
NMPST
8
DASPST
9~17
CPUADR17~9
18
VDD18
19
VSS
20
DRAMVDD18
21
DRAMVSS
22~30
CPUADR8~0
31
VDD3
32
VSS
33
DRAMVDD3
133
132
89
88
DVD-ROM
Formatter
CD-PRE
Instruction
CGEN
memory
(40KB)
Data
MODE
memory
(6KB)
General purpose IO bus
WDT
timer x 2
I/O
O
Interruption of system control 0,1
-
Power supply terminal for I/O(3.3V)
-
Connect to ground
O
Interruption of system control 2
O
Wait control of system control
O
Reset of system control (Non connect)
I
Setting of initial value of DASP signal
I
System control address
-
Power supply terminal for I/O (1.8V)
-
Connect to ground
-
Power supply terminal for DRAM (1.8V)
-
Connect to ground for DRAM
I
System control address
-
Power supply terminal for I/O (3.3V)
-
Connect to ground
-
Power supply terminal for DRAM (3.3V)
Host I/F
DMA
ECC
MPEG I/F
I/F
High speed IO bus
DMA
32 bit
CPU core
BCU
DRAMC
16 bit
SYSTEM
I/F
Description
XV-N50BK,XV-N55SL
ATAPI
2Mbit
DRAM
INTC
(No.A0041)1-33

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