Technical Description; Bluetooth™ Gps Receiver Architecture; Technical Specifications; Electrical Characteristics - FALCOM NAVI-XS POI User Manual

NAVI-XS POI U ' G
SER S UIDE

2 TECHNICAL DESCRIPTION

2.1 Bluetooth™ GPS Receiver architecture
The NAVI-XS POI OEM GPS receiver from FALCOM is a new OEM product that
features the SiRFstarIIx single chipset. The core of NAVI-XS POI is comprised of the
GSC2x - that includes the Digital and RF in a single chip. The flexibility of the core
allows the core processing engine and memory to be reconfigured to track up to 12
satellites. The core of NAVI-XS POI contains a built in sequencer, which handles all
the high-rate interrupts for GPS tracking and acquisitions. After initialization, the
receiver handles all the time critical and low latency acquisition, tracking and
reacquisition tasks of GPS autonomously. The on-chip SRAM size is 1-Mbit memory
that is used for instructions. The internal XTrac 2.0.2 firmware stored in the 8 Mbit
FLASH completes the package providing flexible system architecture. The data
delivered from GPS receiver will be sent via Bluetooth™ antenna to the host device
(to the connected Bluetooth™ enabled device).
Figure 4:

2.2 Technical specifications

2.2.1 Electrical Characteristics

2.2.1.1

General

Frequency
C/A code
Channels
2.2.1.2

Accuracy

Position
Velocity
Time
This confidential document is a property of FALCOM GmbH and may not be copied or circulated without previous permission.
The architecture of NAVI-XS POI Bluetooth™ GPS receiver
L1, 1575.42 MHz
1.023 MHz chip rate
12
10 meters CEP without SA
0.1 meters/second, without SA
1 microsecond synchronized to GPS time
V 1.00
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