Ps/2-Type Keyboard Transmissions; Figure C-2. Ps/2 Keyboard - HP Compaq D315 Technical Reference Manual

Hp personal computers technical reference guide
Table of Contents

Advertisement

C.2.1 PS/2-TYPE KEYBOARD TRANSMISSIONS
The PS/2-type keyboard sends two main types of data to the system; commands (or responses to
system commands) and keystroke scan codes. Before the keyboard sends data to the system
(specifically, to the 8042-type logic within the system), the keyboard verifies the clock and data
lines to the system. If the clock signal is low (0), the keyboard recognizes the inhibited state and
loads the data into a buffer. Once the inhibited state is removed, the data is sent to the system.
Keyboard-to-system transfers (in the default mode) consist of 11 bits as shown in Figure C-2.
Tcy
Tcl
Tch
Clock
Start
Bit
Data
Parameter
Tcy (clock cycle)
Tcl (clock low)
Tch (clock high)
Th-b-t (high-before-transmit)
Figure C–2. PS/2 Keyboard-To-System Transmission, Timing Diagram
The system can halt keyboard transmission by setting the clock signal low. The keyboard checks
the clock line every 60 µs to verify the state of the signal. If a low is detected, the keyboard will
finish the current transmission if the rising edge of the clock pulse for the parity bit has not
occurred. The system uses the same timing relationships during reads (typically with slightly
reduced time periods).
The enhanced keyboard has three operating modes:
♦ Mode 1 - PC-XT compatible
♦ Mode 2 - PC-AT compatible (default)
♦ Mode 3 - Select mode (keys are programmable as to make-only, break-only, typematic)
Modes can be selected by the user or set by the system. Mode 2 is the default mode. Each mode
produces a different set of scan codes. When a key is pressed, the keyboard processor sends that
key's make code to the 8042 logic of the system unit. The When the key is released, a release
code is transmitted as well (except for the Pause key, which produces only a make code). The
8042-type logic of the system unit responds to scan code reception by asserting IRQ1, which is
processed by the interrupt logic and serviced by the CPU with an interrupt service routine. The
service routine takes the appropriate action based on which key was pressed.
Th-b-t
(LSb)
Data
Data
Data
0
1
2
Minimum
Changed –- April 2003
Data
Data
Data
Data
3
4
5
Nominal
60 us
--
30 us
41 us
30 us
--
--
20 us
hp/Compaq Personal Computers
Technical Reference Guide
(MSb)
Data
Parity
Stop
6
7
Bit
Maximum
80 us
50 us
40 us
--
C-3
Bit

Advertisement

Table of Contents
loading

This manual is also suitable for:

D325 mtD325 stD325

Table of Contents