HP Compaq D315 Technical Reference Manual page 84

Chapter 5 Input/Output Interfaces
5.2.1.1 IDE Configuration Registers
The IDE controller is configured as a PCI device with bus mastering capability. The PCI
configuration registers for the IDE controller function (PCI device #9, function #0) are listed in
Table 5-1.
Table 5–1. IDE PCI Configuration Registers
IDE PCI Configuration Registers (MCP, Device 9/Function 0)
PCI Conf.
Addr. Register
00, 01h Vender ID
02, 03h Device ID
04, 05h PCI Command
06-07h PCI Status
08h Revision ID
09 – 0Bh Class Code
0Ch Cache Line Size
0Dh Master Latency Timer
0Eh Header Type
0Fh BIST
10 – 13h Pri. Cmd. I/O Base Addr.
14 – 17h Pri. Cntrl. I/O Base Addr.
18 – 1Bh Sec. CMD I/O Base Addr.
1C – 1Fh Sec. Cntrl. I/O Base Addr.
20h Bus Mstr. I/O Base Addr.
2Ch Subsystem Vendor ID
2Eh Subsystem ID
34h Capabilities Pointer
NOTES:
[1] D315 = 01BCh, d325 = 0065h
5.2.1.2 IDE Bus Master Control Registers
The IDE interface can perform PCI bus master operations using the registers listed in Table 5-2.
These registers occupy 16 bytes of variable I/O space set by software and indicated by PCI
configuration register 20h in the previous table.
Table 5–2. IDE Bus Master Control Registers
I/O Addr. Size
Offset (Bytes)
00h 1
02h 1
04h 4
08h 1
0Ah 2
0Ch 4
NOTE:
Unspecified gaps are reserved, will return indeterminate data, and should not be written to.
5-2 Compaq D315 and hp d325 Personal Computers
Featuring the AMD Athlon XP Processor
Table 5-1.
Reset
Value
10DEh
0000h
00B0h
01018Ah
0000h
0000h
Table 5-2.
IDE Bus Master Control Registers
Register
Bus Master IDE Command (Primary)
Bus Master IDE Status (Primary)
Bus Master IDE Descriptor Pointer (Pri.)
Bus Master IDE Command (Secondary)
Bus Master IDE Status (Secondary)
Bus Master IDE Descriptor Pointer (Sec.)
Second Edition – April 2003
PCI Conf.
Addr. Register
3Ch Interrupt Line
[1] 3Dh Interrupt Pin
3Eh Minimum Grant
3Fh Maximum Latency
A1h 40h Write SS Vendor ID
42h Write SS ID
00h 44h Power Mgmt. Config.
00h 45h Next Item Pointer
00h 46h Power Mgmt. Capabilities
00h 48h Power Mgmt. Cntrl./Sts.
1d 4Bh Power Mgmt. Data
1d 50h IDE Config.
1d 58, 59h IDE Timing
1d 5A, 5Bh IDE Timing
1d 5Ch IDE Cycle & Addr. Timing
5Dh IDD Cycle & Addr. Timing
60h UDMA Mode Selection
44h - -
Default
Value
00h
00h
0000 0000h
00h
00h
0000 0000h
Reset
Value
00h
01h
03h
01h
0000h
0000h
01h
00h
E802h
0000h
00h
0000h
A8A8h
A8A8h
00FFh
FFFFh
0s
-