HP Compaq D315 Technical Reference Manual page 61

AGP 2X Transfers
During AGP 2X transfers, clocking is basically the same as in 1X transfers except that the 66-
MHz CLK signal is used to qualify only the control signals. The data bytes are latched by an
additional strobe (AD_STBx) signal so that an 8-byte transfer occurs in one CLK cycle (Figure 4-
6). The first four bytes (DnA) are latched by the receiving agent on the falling edge of AD_STBx
and the second four bytes (DnB) are latched on the rising edge of AD_STBx. The signal level for
AGP 2X transfers may be 3.3 or 1.5 VDC.
T1
CLK
AD
AD_STBx
GNT-
TRDY-
ST0..2
00x
Figure 4-6. AGP 2X Data Transfer (Peak Transfer Rate: 532 MB/s)
AGP 4X Transfers
The AGP 4X transfer rate allows sixteen bytes of data to be transferred in one clock cycle. As in
2X transfers the 66-MHz CLK signal is used only for qualifying control signals while strobe
signals are used to latch each 4-byte transfer on the AD lines. As shown in Figure 4-7, 4-byte
block DnA is latched by the falling edge of AD_STBx while DnB is latched by the falling edge of
AD_STBx-. The signal level for AGP 4X transfers is 1.5 VDC.
T1
CLK
AD
AD_STBx
AD_STBx-
ST0..2
xxx
Figure 4-7. AGP 4X Data Transfer (Peak Transfer Rate: 1064 MB/s)
T2 T3 T4
D1A D1B D2A D2B
xxx
xxx
T2
D1A D1B D2A
00x
Compaq D315 and hp d325 Personal Computers
Featuring the AMD Athlon XP Processor
Second Edition - April 2003
Technical Reference Guide
T5 T6
D3A D3B D4A D4B
xxx
xxx
xxx
T3
D2B D3A D3B D4A D4B
xxx
T7
T4
xxx
4-11