Inside The Provision Asic Architecture; Classification And Lookup - HP 5400zl Series Technical Overview

Figure 1. ProVision ASIC Architecture for HP ProCurve Switch 5406zl
The diagram above illustrates an example of the logical interconnection of the ProVision ASICs on the
6-slot 5406zl series switch. All of the key elements are connected to the active backplane. The active
backplane contains the switch fabric and distributes power to all modules. The HP ProCurve Switch
5412zl, 3548yl, 3524yl, and 6224yl have similar architectural components. The primary difference in
the illustration would be the number of ports supported.

Inside the ProVision ASIC Architecture

Each line interface module contains a full ASIC-based Layer 3 routing switch engine as well as Layer
4 filtering and metering. These new ProVision ASICs are HP ProCurve's 4th-generation switching
ASICs. This network switch engine, in the ProVision ASICs, provides all the packet processing: Layer
2 and Layer 3 lookups; filtering and forwarding decisions; VLAN, trunking, and priority queuing
determinations. The ProVision ASIC on each line card contains its own CPU. These features of the
ProVision ASIC are common for all products in the HP ProCurve Switch 5400zl, 3500yl, and 6200yl
series.

Classification and lookup

When a packet first comes in, the classifier section determines the packet characteristics, its addresses,
VLAN affiliation, any priority specification, etc. The packet is stored in input memory; lookups into
the table memory are done to determine routing information; and a ProVision ASIC-specific packet
header is created for the packet with this information. This header is then forwarded to the Policy
Enforcement Engine.
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