Circuit Description; Receiver Circuits - Icom IC-V8 Service Manual

SECTION 4
4-1

RECEIVER CIRCUITS

4-1-1 ANTENNA SWITCHING CIRCUIT
Received signals passed through the low-pass filter (L1, L2,
C1–C5). The filtered signals are applied to the 1/4
antenna switching circuit (D1, D2, D8, L15, C76).
The antenna swtiching circuit functions as a low-pass filter
while transmitting. However, its impedance becomes very
high while D2 and D8 are turn ON. Thus transmit signals are
blocked from entering the receiver circuits. The antenna
switching circuit employs a 1/4
tem. The passed signals are then applied to the RF amplifi-
er circuit.
4-1-2 RF CIRCUIT
The RF circuit amplifies signals within the range of frequen-
cy coverage and filters out-of-band signals.
The signals from the antenna switching circuit are applied to
the limitter (D50), and are then passed through the band-
pass filter (D9, L16, C80). The filtered signals are amplified
at the RF amplifier (Q12), then applied to the 1st mixer cir-
cuit after out-of-band signals are suppressed at the band-
pass filter (D11, D12, L19, C91–C97).
D9, D11, D12 employ varactor diodes that track the band-
pass filters and are controlled by the T1–T3 signals from the
D/A convertor (IC10, pins 2, 3, 10). These diodes tune the
center frequency of an RF passband for wide bandwidth
receiving and good image response rejection.
4-1-3 1ST MIXER AND 1ST IF CIRCUITS
The 1st mixer circuit converts the received signal to a fixed
frequency of the 1st IF signal with a PLL output frequency.
By changing the PLL frequency, only the desired frequency
will pass through two crystal filters at the next stage of the
1st mixer.
The signals from the RF circuit are mixed at the 1st mixer
(Q13) with a 1st LO signal coming from the VCO circuit to
produce a 21.70 MHz 1st IF signal.
• 2ND IF AND DEMODULATOR CIRCUITS
R87
"SQLIN" signal from the
D/A convertor (IC10, pin 23)
AF signal "DET"

CIRCUIT DESCRIPTION

type
type diode swtiching sys-
C122
R86
8
R88
Active
filter
FM
detector
9 10
R83
C112 C113
X3
The 1st IF signal is applied to two crystal filters (FI1 and FI3)
to suppress out-of-band signals. The filtered 1st IF signal is
applied to the IF amplifier (Q14), then applied to the 2nd
mixer circuit (IC1, pin 16).
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double conversion superheterodyne system (which
converts receive signal twice) improves the image rejection
ratio and obtain stable receiver gain.
The 1st IF signal from the IF amplifier is applied to the 2nd
mixer section of the FM IF IC (IC2, pin 16), and is mixed with
the 2nd LO signal to be converted to a 450 kHz 2nd IF sig-
nal.
The FM IF IC contains the 2nd mixer, limiter amplifier, quad-
rature detector and active filter circuits. A 21.25 MHz 2nd LO
signal is produced at the PLL circuit.
The 2nd IF signal from the 2nd mixer (IC2, pin 3) passes
through a ceramic filter (FI2) to remove unwanted hetero-
dyned frequencies. It is then amplified at the limiter amplifi-
er (IC2, pin 5) and applied to the quadrature detector (IC2,
pins 10, 11) to demodulate the 2nd IF signal into AF signals.
4-1-5 AF CIRCUIT
The AF amplifier circuit amplifies the demodulated AF sig-
nals to drive a speaker.
AF signals from the FM IF IC (IC2, pin 9) are applied to the
analog swtich (IC4, pin 1) via the AF filter circuit (IC3b, pins
6, 7). The output signals from pin 2, 3 are passed through
the low-pass filter (IC3d, pins 13, 14), and are then applied
to the analog swtich (IC4, pin 9, 10) again. The signals from
the IC4, pin 11 are applied to the AF power amplifier (IC5,
pin 4) after passing through the D/A convertor (IC10, pins
12, 11).
2nd IF filter
450 kHz
C121
FI2
7 5 3
Noise
Noise
comp.
detector
Mixer
Limiter
amp.
RSSI
11 12 13
C116
"NOIS" signal to the CPU pin 19
R82
"SD" signal to the CPU pin 98
R5
R84
4 - 1
PLL IC
IC1
16
LPF
2
X1
21.25 MHz
IC2 TA31136F
16
1st IF from the IF amplifier (Q14)
1