Section 4 Circuit Description; Receiver Circuits - Icom IC-F1721/D Service Manual

SECTION 4 CIRCUIT DESCRIPTION

4-1 RECEIVER CIRCUITS

4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT)
The antenna switching circuit functions as a low-pass filter
while receiving and a resonator circuit while transmitting.
This circuit does not allow transmit signals to enter the
receiver circuits.
Received signals enter the antenna connector (CHASSIS;
J1) and pass through the low-pass filters (L42–L44, C375,
C388, C389, C391, C432, C461). The filtered signals are
λ
passed through the ⁄ type antenna switching circuit (D29,
4
D30) and then applied to the RF circuit.
4-1-2 RF CIRCUIT (MAIN UNIT)
The RF circuit amplifies signals within the range of fre-
quency coverage and filters out-of-band signals.
The signals from the antenna switching circuit pass
through the two-stage tunable bandpass filters (D23, D26,
L32, L36). The filtered signals are amplified at the RF
amplifier (Q24) and then passed through the another two-
stage tunable bandpass filters (D17, D18, L28) to suppress
unwanted signals. The filtered signals are applied to the
1st mixer circuit.
D17, D18, D23 and D26 employ varactor diodes, that
are controlled by the MAIN CPU (IC23) via the D/A con-
verter (IC30, pins 1, 2), to track the bandpass filter. These
varactor diodes tune the center frequency of an RF
passband for wide bandwidth receiving and good image
response rejection.
• 2ND IF AND DEMODULATOR CIRCUITS
2
IC8
1
Quadrature
AF signals
8 7
Active
filter
Limiter
amp.
detector
9 10 11
X4 Discriminator
4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT)
The 1st mixer circuit converts the received signals into
fixed frequency of the 1st IF signal with the PLL output fre-
quency. By changing the PLL frequency, only the desired
frequency passes through a monolithic filter at the next
stage of the 1st mixer.
The RF signals from the bandpass filter are mixed with
the 1st LO signals, where come from the RX VCO circuit
(Q11, D6, D7) via the LO amplifier (Q21) and low-pass
filter (L24, C246, C264), at the 1st mixer circuit (D16, L22,
L23) to produce a 46.35 MHz 1st IF signal. The 1st IF sig-
nal is passed through a monolithic filter (FI4) to supplies
unwanted signals and to pass only the desired signals after
being amplified at the IF amplifiers (Q10, Q13, Q14). The
filtered signal is applied to the 1st IF amplifier (Q6) and
then applied to the 2nd IF circuit.
4-1-4 2ND IF AND DEMODULATOR CIRCUITS
(MAIN UNIT)
The 2nd mixer circuit converts the 1st IF signal into a 2nd
IF signal. The double-conversion superheterodyne system
(which convert receive signals twice) improves the image
rejection ratio and obtains stable receiver gain.
The 1st IF signal from the IF amplifier (Q6) is applied to
the 2nd mixer section of the FM IF IC (IC12, pin 16), and
is mixed with the 2nd LO signal to be converted into a
450 kHz 2nd IF signal.
The FM IF IC (IC12) contains the 2nd mixer, limiter ampli-
fier, quadrature detector, active filter and noise amplifier
circuits.
2nd IF filters
450 kHz
FI2 FI1
5 3
Noise
detector
RSSI
13
NOIS signal to the CPU (IC23: pin 37)
5V
4 - 1
Q1
45.9 MHz
BPF 3
2
X2
15.3 MHz
Mixer
IC12
TA31136FN
16
1st IF from the IF amplifier (Q6)