Memory Interleaving; Memory Board Configuration Table - Fujitsu D3081 Technical Manual

Features
3.2.2.3

Memory interleaving

In Interleaving mode, the physical memory address is decoded at a specific bit
and is sliced into several memory controllers. Interleaving mode is supported by
default.
3.2.3

Memory board configuration table

Table 6 shows the DIMM slot population order and the mapping of DIMM slots
to CPUs and IOHs for 4, 6, and 8 CPUMEMRs.
CPU DIMM 4 CPUMEMRs
No. slot
1B
pop.
1D
order
1F
1H
CPU#1 1 x
2 x
3 x
4 x
CPU#2 1 x
2 x
3 x
4 x
CPU#3 0 --
1 x
2 x
3 x
4 x
Table 6: DIMM slot population order and mapping of DIMM slots to I/O Hubs and CPUs
34
6 CPUMEMRs
1A 2B 2A 1B
1C 2D 2C 1D
1E 2F 2E 1F
1G 2H 2G 1H
-- -- -- x
x -- -- x
x x -- x
x x x x
-- -- -- x
x -- -- x
x x -- x
x x x x
-- -- -- --
-- -- -- x
x -- -- x
x x -- x
x x x x
Technical Manual
8 CPUMEMRs
1A 2B 2A 1B
1C 2D 2C 1D
1E 2F 2E 1F
1G 2H 2G 1H
-- -- -- x
x -- -- x
x x -- x
x x x x
-- -- -- x
x -- -- x
x x -- x
x x x x
-- -- -- --
-- -- -- x
x -- -- x
x x -- x
x x x x
D3081, D3131, D3082 (RX900 S1)
IOH
No.
1A 2B 2A
1C 2D 2C
1E 2F 2E
1G 2H 2G
-- -- -- #1
x -- --
x x --
x x x
-- -- -- #1
x -- --
x x --
x x x
-- -- -- #2
-- -- --
x -- --
x x --
x x x