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Figure 8
shows example scenarios for a 4 CPUMEMR configuration with intra-
CPUMEMR mirroring in the event of DIMM failure and/or deactivation.
DIMM
failure
Failed
Failed
OK
Failed
OK
OK
OK
OK
OK
Memory mirroring
disabled
Figure 8: Intra-CPUMEMR mirroring scenarios after DIMM module failure/deactivation
3.2.2.2
Hemisphere mode
The Nehalem-EX CPU has two memory-controller modes:
1 - 4 CPU configuration: Non-Hemisphere mode
5 - 8 CPU configuration: Hemisphere mode
In hemisphere mode, the address space of a CPU is subdivided into two
sections called upper and lower hemisphere. Data is distributed over these two
sections for better performance.
As hemisphere mode is used for configurations with more than 4 CPUs, an even
number of CPUs is necessary to configure memory-mirroring.
D3081, D3131, D3082 (RX900 S1)
OK
OK
OK
OK
OK
OK
OK
OK
DIMM
disabled
Disabled
Disabled
OK
Disabled
OK
OK
OK
OK
OK
Memory mirroring
disabled
Technical Manual
Features
Mirroring pair
Disabled
Failed
OK
OK
OK
OK
Disabled
Failed
Disabled
Disabled
Memory mirroring
enabled
33
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