Performance Features; Overview - Fujitsu D2861 Tehnical Manual

3

Performance features

3.1

Overview

Processors
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– 1 or 2 Intel Xeon
– 2 LGA1366 processor sockets for Intel
– Integrated memory controller (DDR3)
– 32 KB L1 cache (on-die data cache for each processor core)
– 256 KB mid-level cache per processor core
– Up to 12 MB on-chip shared L2 cache (shared by all processor cores)
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– 2x Intel QuickPath Interconnect connections with up to 6.4 GT/s in each
direction
Main memory
– 12 slots for DDR3 memory modules (DIMMs) with 800/1066/1333 MHz and
a capacity of 2 GB, 4 GB, 8 GB and 16 GB
– Both unbuffered ("UDIMM", up to 2 GB) and buffered ("RDIMM", up to
16 GB) memory modules are supported, mix of memory is not permitted
– Maximum 192 GB memory, minimum 2 GB (1 memory module)
– Maximum 32 Gbit/s bandwidth (DDR3)
– Both CPUs have 2 DIMM slots for memory per channel
– ECC error detection and error correction
– Memory Scrubbing function
– Single Device Data Correction (SDDC) function (Chipkill™) only for RDIMM
Chips on the system board
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– Intel 5500 Chipset
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– Intel ICH10R Base
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– Intel IOH24D
– 2x dual-port Gigabit Ethernet controllers Intel
– TPM 1.2 Infineon SLB9635 TT1.2 (optional)
– iRMC S2 (integrated Remote Management Controller) with integrated
graphics controller
– 2 MB Flash ROM
– 32Mx16 DDR2 667 SRAM for iRMC S2
– ADT7462 temperature/system monitoring controller
D2861 (BX922 S2)
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processors of the 5500 or 5600 series
Technical Manual
® ®
Xeon processors
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82576EB
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