Page 1 Hitachi Global Storage Technologies Hard Disk Drive Specification Hitachi Travelstar 80GN 2.5 inch ATA/IDE hard disk drive Models: IC25N020ATMR04 IC25N030ATMR04 IC25N040ATMR04 IC25N060ATMR04 IC25N080ATMR04 Revision 2.0 19 September 2003 Document Part # S13K-1055-20 Publication Number 1550...
Page 2 Hard Disk Drive Specification Travelstar 80GN 2.5 inch ATA/IDE hard disk drive Models: IC25N020ATMR04 IC25N030ATMR04 IC25N040ATMR04 IC25N060ATMR04 IC25N080ATMR04 Revision 2.0 19 September 2003 Document Part # S13K-1055-20 Publication Number 1550...
Page 3 This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the informa- tion herein; these changes will be incorporated in new editions of the publication. Hitachi may make improvements or changes in any products or programs described in this publication at any time.
Page 5: Table Of Contents
Hitachi Global Storage Technologies Table of Contents 1.0 General............................5 1.1 Introduction..........................5 1.2 References..........................5 1.3 Abbreviations.........................5 1.4 Caution...........................7 1.5 Drive handling precautions ....................8 2.0 Outline of the drive ........................9 3.0 Fixed-disk subsystem description.....................13 3.1 Control electronics .........................13 3.2 Head disk assembly data......................13 4.0 Drive characteristics ........................15...
Page 6 6.3.4 Service life and usage condition ...................29 6.3.5 Preventive maintenance ....................29 6.3.6 Load/unload ........................29 6.4 Mechanical specifications......................31 6.4.1 Physical dimensions and weight ...................31 6.4.2 Mounting hole locations ....................32 6.4.3 Connector and jumper description ................32 6.4.4 Mounting orientation ....................33 6.4.5 Load/unload mechanism ....................33 6.5 Vibration and shock .......................33 6.5.1 Operating vibration .......................33 6.5.2 Nonoperating vibration ....................34...
Page 7 Hitachi Global Storage Technologies 7.9.7 Device Terminating Write DMA ..................53 7.9.8 Host Terminating Write DMA..................54 7.10 Drive address setting......................55 7.11 Addressing of HDD registers....................56 8.0 General............................59 8.1 Introduction..........................59 8.2 Terminology...........................59 9.0 Deviations from standard......................61 10.0 Register .............................63 10.1 Alternate Status Register .....................64 10.2 Command Register ......................64...
Page 8 11.8.1 Attributes ........................77 11.8.2 Attribute values......................77 11.8.3 Attribute thresholds.....................77 11.8.4 Threshold exceeded condition ..................77 11.8.5 S.M.A.R.T. commands ....................77 11.8.6 S.M.A.R.T. operation with power management modes..........78 11.9 Security Mode Feature Set....................78 11.9.1 Security mode ......................78 11.9.2 Security level ......................78 11.9.3 Password ........................79 11.9.4 Master Password Revision Code ................79 11.9.5 Command table ......................82 11.10 Protected Area Function ....................83...
Page 9 Hitachi Global Storage Technologies 13.13 Read DMA (C8h/C9h).......................124 13.14 Read DMA EXT (25h) ......................126 13.15 Read Long (22h/23h) ......................128 13.16 Read Multiple (C4h) ......................130 13.17 Read Multiple EXT (29h) ....................132 13.18 Read Native Max ADDRESS (F8h) ..................133 13.19 Read Native Max ADDRESS EXT (27h)................134 13.20 Read Sectors (20h/21h)......................135...
Page 10 15.2 SET FEATURES Commands Support Coverage ..............197 15.3 Changes from Travelstar 60GH and 40GN .................198...
Page 11 Hitachi Global Storage Technologies List of Tables Table 1: Formatted capacities ....................15 Table 2: Data sheet .......................15 Table 3: Cylinder allocation ....................16 Table 4: Performance characteristics ..................17 Table 5: Mechanical positioning performance ..............17 Table 6: Full stroke seek time ....................18 Table 7: Single track seek time .....................18...
Page 12 Table 44: Reset response table ....................69 Table 45: Default Register Values ..................70 Table 46: Diagnostic codes ....................70 Table 47: Reset error register values ..................71 Table 48: Device behavior by ATA command ..............72 Table 49: Power conditions ....................75 Table 50: Initial setting ......................79 Table 51: Usual operation for POR ..................80 Table 52: Password lost ......................81 Table 53: Command table for device lock operation ............82...
Page 13 Hitachi Global Storage Technologies Table 90: Read Native Max ADDRESS EXT (27h) ............133 Table 91: Read Sectors (20h/21h) ..................134 Table 92: Read Sector(s) EXT Command (24h) ..............135 Table 93: Read Verify Sectors (40h/41h) ................137 Table 94: Read Verify Sector(s) EXT Command (42h) ............139 Table 95: Recalibrate (1xh) ....................141...
Page 15: General
1.0 General 1.1 Introduction This document describes the specifications of the following Travelstar 80GN, a 2.5-inch hard disk drive, ATA/IDE interface with a rotational speed of 4200 RPM and a height of 9.5 mm: Drive Name Model Number Capacity(GB) Height (mm) Rotational speeed Travelstar 80GN IC25N080ATMR04...
Page 16 Electrostatic Discharge Federal Communications Commission field replacement unit gravity (a unit of force) (32 ft/sec) per Hertz 1,000,000,000 bits 1,000,000,000 bytes ground hexadecimal hard disk drive Hertz Input integrated lead suspension Input/Output International Standards Organization 1,000 bytes Kbpi 1000 bits per inch kgf-cm kilogram (force)-centimeter kilohertz...
Page 17: Caution
root mean square revolutions per minute reset read/write second SELV secondary low voltage S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology tracks per inch track transistor-transistor logic Underwriters Laboratory volt Verband Deutscher Electrotechniker watt 3-state transistor-transistor tristate logic 1.4 Caution • Do not apply force to the top cover (See figure below). •...
Page 18: Drive Handling Precautions
1.5 Drive handling precautions Do not press on the drive cover during handling. Travelstar 80GN Hard Disk Drive Specification...
Page 19: Outline Of The Drive
2.0 Outline of the drive • 2.5 inch, 9.5-mm height • Formatted capacities of 80 GB, 60 GB, 40 GB, 30 GB, 20 GB • 512 bytes/sector • AT Interface (Enhanced IDE) conforming to ATA/ATAPI-6 • Integrated controller • No-ID recording format •...
Page 20 Travelstar 80GN Hard Disk Drive Specification...
Page 21 Part 1. Functional specification Travelstar 80GN Hard Disk Drive Specification...
Page 22 Travelstar 80GN Hard Disk Drive Specification...
Page 23: Fixed-Disk Subsystem Description
3.0 Fixed-disk subsystem description 3.1 Control electronics The control electronics works with the following functions: • AT Interface Protocol • Embedded Sector Servo • No-ID (TM) formatting • Multizone recording • Code: 96/102 MTR • ECC On-The-Fly • Enhanced Adaptive Battery Life Extender 3.2 Head disk assembly data The following technologies are used in the drive: •...
Page 24 Travelstar 80GN Hard Disk Drive Specification...
Page 25: Drive Characteristics
4.0 Drive characteristics 4.1 Formatted capacity Table 1: Formatted capacities 80 GB model 60 GB model 40 GB model 30 GB model 20 GB model Physical Layout Bytes per sector Sectors per track 392-952 392-952 392-952 392-952 392-952 Number of heads Number of disks Logical layout Number of heads...
Page 26: Cylinder Allocation
4.3 Cylinder allocation The table shows typical data format (96K TPI / 712K BPI). Each drive is formatted in the factory test by optimiz- ing TPI/BPI combination. Contact Hitachi technical support for detail. Table 3: Cylinder allocation 96 kTPI / 712 kBPI format...
Page 27: Performance Characteristics
4.4 Performance characteristics Drive performance is characterized by the following parameters: • Command overhead • Mechanical head positioning Seek time Latency • Data transfer speed • Buffering operation (read ahead/write cache) Note: All the above parameters contribute to drive performance. There are other parameters that contribute to the performance of the actual system.
Page 28: Table 6: Full Stroke Seek Time
“Typical” and “Max” are used throughout this document and are defined as follows: Typical Average of the drive population tested at nominal environmental and voltage conditions. Maximum value measured on any one drive over the full range of the environmental and voltage conditions.
Page 29: Operating Modes
4.4.2.4 Average latency Table 8: Average latency Rotational speed Time for one Average latency (RPM) revolution (ms) (ms) 4200 14.3 4.4.2.5 Drive ready time Table 9: Drive ready time Drive ready time (sec) Condition Typical Power on to Ready The condition in which the drive is able to perform a media access command (for exam- Ready ple- read, write) immediately.
Page 30: Table 11: Drive Ready Time
Table 10: Description of operating modes Operating mode Description The device interface is capable of accepting commands. The spindle motor is stopped. Standby All circuitry but the host interface is in power saving mode. The spindle motor is stopped. All circuitry but the host interface is in power saving mode. The device requires a soft reset or a hard reset to be activated.
Page 31: Data Integrity
5.0 Data integrity 5.1 Data loss at power off Data loss will not be caused by a power off during any operation except the write operation. A power off during a write operation causes the loss of any received or resident data that has not been writ- ten onto the disk media.
Page 32: Write Safety
5.4 WRITE safety The drive ensures that the data is written into the disk media properly. The following conditions are moni- tored during a write operation. When one of these conditions exceeds the criteria, the write operation is ter- minated and the automatic retry sequence is invoked. •...
Page 33: Ecc
5.8 ECC The 52 byte four way interleaved ECC processor provides user data verification and correction capability. The first 4 bytes of ECC are check bytes for user data and the other 48 bytes are Read Solomon ECC. Each interleave has 12 bytes for ECC. Hardware logic corrects up to 20 bytes (5 bytes for each interleave) errors on-the-fly.
Page 34 Travelstar 80GN Hard Disk Drive Specification...
Page 35: Specification
6.0 Specification 6.1 Environment 6.1.1 Temperature and humidity Table 13: Environmental condition Operating conditions Temperature 5 to 55ºC (See note below) Relative humidity 8 to 90%, non-condensing Maximum wet bulb temperature 29.4ºC, non-condensing Maximum temperature gradient 20ºC/hour Altitude –300 to 3,048 m (10,000 ft) Non-operating conditions Temperature –40 to 65ºC...
Page 36: Radiation Noise
Specification (Environment) 41'C/95% 31'C/90% WetBulb 40'C WetBulb29.4'C Non Operating Operating 65'C/23% 55'C/15% Temperature (degC) Figure 1: Limits of temperature and humidity 6.1.1.1 Corrosion test The drive must be functional and show no signs of corrosion after being exposed to a temperature humidity stress of 50°C/90% RH (relative humidity) for one week followed by a temperature and humidity drop to 25°C/40%RH in 2 hours.
Page 37: Conductive Noise
Table 14: Magnetic flux density limits Frequency (KHz) Limits (uT RMS) 61–100 101–200 201–400 6.1.3 Conductive noise The disk drive shall work without soft error degradation in the frequency range from DC to 20 Mhz injected through any two of the mounting screw holes of the drive when an AC current of up to 45 mA (p-p) is applied through a 50-ohm resistor connected to any two mounting screw holes.
Page 38: Power Consumption Efficiency
40GB, 30GB 20GB Watts (RMS typical) 80GB, 60GB models models Average from power on to ready Footnotes: The maximum fixed disk ripple is measured at the 5 volt input of the drive. The disk drive shall not incur damage for an over voltage condition of +25% (maximum duration of 20 ms) on the 5 volt nominal supply.
Page 39: Service Life And Usage Condition
common mode noise or voltage level difference between the system frame and power cable ground or AT interface cable ground should be in the allowable level specified in the power requirement section. 6.3.4 Service life and usage condition The drive is designed to be used under the following conditions: •...
Page 40 HDD to nontypical mechan- ical stress. Power cycling testing may be required to test the boot-up function of the system. In this case Hitachi recommends that the power-off portion of the cycle contain the sequence specified in Section 6.3.6.2, “Required Power-Off Sequence”...
Page 41: Mechanical Specifications
6.4 Mechanical specifications 6.4.1 Physical dimensions and weight The following table lists the dimensions of the drive. Table 17: Physical dimensions and weight 80GB, 60GB 40GB, 30GB, 20GB Height [mm] 9.5±0.2 9.5±0.2 Width [mm] 69.85±0.25 69.85±0.25 Length [mm] 100.2±0.25 100.2±0.25 Weight [grams - maximum] 102 Max 95 Max...
Page 42: Mounting Hole Locations
6.4.2 Mounting hole locations The mounting hole locations and size of the drive are shown below. Figure 2: Mounting hole locations 6.4.3 Connector and jumper description A jumper is used to designate the drive address as either master or slave. The jumper setting method is described in Section 7.10, “Drive address setting”...
Page 43: Mounting Orientation
6.4.4 Mounting orientation The drive will operate in all axes (six directions) and will stay within the specified error rates when tilted ±5degrees from these positions. Performance and error rate will stay within specification limits if the drive is operated in the other permissible ori- entations from which it was formatted.
Page 44: Nonoperating Vibration
6.5.1.2 Swept sine vibration Table 19: Swept sine vibration Swept sine vibration (zero to peak 5 to 500 to 5 Hz Sweep rate (oct/min) sine wave) 9.8 m/sec (1 G) (5-500 Hz) 6.5.2 Nonoperating vibration The disk drive withstands the vibration levels described below without any loss or permanent damage. 6.5.2.1 Random vibration The test consists of a random vibration applied in each of three mutually perpendicular axes for a duration of 15 minutes per axis.
Page 45: Nonoperating Shock
The input level shall be applied to the normal disk drive subsystem mounting points used to secure the drive in a normal system. 6.5.4 Nonoperating shock The drive withstands the following half-sine shock pulse without any data loss or permanent damage. Table 22: Nonoperating shock Duration of 1 ms Duration of 11 ms...
Page 46: Discrete Tone Penalty
6.7 Identification labels The following labels are affixed to every drive: • A label which is placed on the top of the head disk assembly containing the statement "Made by Hitachi" or equivalent, part number, EC number, and FRU number.
Page 47: Mic Mark
6.8.4 MIC mark The product complies with the Korea EMC standard. The regulation for certification of information and communi- cation equipment is based on "Telecommunications Basic Act" and "Radio Waves Act." Korea EMC requirment are based technically on CISPR22:1993-12 measurement standards and limits. MIC standards are likewise based on IEC standards.
Page 48 Travelstar 80GN Hard Disk Drive Specification...
Page 49: Electrical Interface Specification
7.0 Electrical interface specification 7.1 Cabling The maximum cable length from the host system to the hard disk drive plus circuit pattern length in the host system shall not exceed 18 inches. 7.2 Interface connector The signal connector for AT attachment is designed to mate with Dupont part number 69764-044 or equivalent. The figure below and Figure 2: “Mounting hole locations”...
Page 50: Signal Definitions
7.3 Signal definitions The pin assignments of interface signals are listed as follows:Signal definitions Table 24: Signal definitions SIGNAL Type SIGNAL Type RESET- DD07 3–state DD08 3–state DD06 3–state DD09 3–state DD05 3–state DD10 3–state DD04 3–state DD11 3–state DD03 3–state DD12 3–state...
Page 51: Signal Descriptions
Table 25: Special signal definitions for Ultra DMA Special Definition Conventional (for Ultra DMA) Definition DDMARDY- IORDY Write Operation HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- Read Operation DSTROBE IORDY STOP DIOW- 7.4 Signal descriptions DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Regis- ter and ECC access.
Page 52 DASP- This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5.0 volts through a 10 k. resistor. During a Power- On initialization or after RESET- is negated, DASP- shall be asserted by device 1 within 400 ms to indicate that device 1 is present.
Page 53 extend the PIO cycle. This line can be connected to the host IORDY signal in order to insert a WAIT state(s) into the host PIO cycle. This signal is an Open-Drain output with 16mA sink capability. 5V Power There are two input pins for the +5 V power supply. One is the "+5 V Logic" input pin and the second is the "+5 V Motor"...
Page 54: Interface Logic Signal Levels
7.5 Interface logic signal levels The interface logic signals have the following electrical specifications: Voltage input high (ViH) 2.0 V min./5.5 V max. Inputs Voltage input low (ViL) –0.5 V min./0.8 V max. Voltage output high at 2.4 V min. IoH min (VoH) Outputs: Voltage output low at...
Page 55: Pio Timings
7.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description. C S (1:0 )- D A (2:0 ) D IO R -, D IO W - t2 i W rite d ata D D (1 5 :0 ) R e ad d a ta D D (1 5 :0 ) t6 z...
Page 56: Multi Word Dma Timings
7.8 Multi word DMA timings The Multi word DMA timings meet Mode 2 of the ATA/ATAPI-6 description. DMARQ tLR/tLW DMACK- tKR/tKW DIOR-/DIOW- READ DD(15:0) WRITE DD(15:0) Table 27: Multiword DMA cycle timings PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time –...
Page 57: Ultra Dma Timings
7.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, 3, 4 and 5 of the Ultra DMA Protocol. 7.9.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tZAD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxx...
Page 58: Host Pausing Read Dma
7.9.2 Host Pausing Read DMA DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE Table 29: Ultra DMA cycle timings (Host Pausing Read) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns)
Page 59: Host Terminating Read Dma
7.9.3 Host Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE xxxxxxxxxxxxxxxxxx RD Data xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD Table 30: Ultra DMA cycle timings (Host Terminating Read) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4...
Page 60: Device Terminating Read Dma
7.9.4 Device Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD Table 31: Ultra DMA cycle timings (Device Terminating Read) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5...
Page 61: Initiating Write Dma
7.9.5 Initiating Write DMA DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD Table 32: Ultra DMA cycle timing (Initiating Write) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5...
Page 62: Device Pausing Write Dma
7.9.6 Device Pausing Write DMA DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE Table 33: Ultra DMA cycle timing (Device Pausing Write) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns)
Page 63: Device Terminating Write Dma
7.9.7 Device Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 34: Ultra DMA cycle timings (Device TerminatingWrite) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION...
Page 64: Host Terminating Write Dma
7.9.8 Host Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 35: Ultra DMA cycle timings (Host Terminating Write) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (ns) (ns)
Page 65: Drive Address Setting
7.10 Drive address setting A jumper placed on the interface connector determines the drive address. Three drive addresses are shown below. Two addresses require the setting of a jumper. Figure 3: Drive address setting Setting 1—Device 0 (Master) (no jumper is used) Setting 2—Device 1 (Slave) Setting 3—Cable Select Setting 4—Do not attach a jumper here...
Page 66: Addressing Of Hdd Registers
7.11 Addressing of HDD registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0- and CS1-) and three address lines (DA00–02) are used to select one of these registers, while a DIOR- or DIOW- is provided at the specified time.
Page 67 Part 2. Interface specification Travelstar 80GN Hard Disk Drive Specification...
Page 68 Travelstar 80GN Hard Disk Drive Specification...
Page 69: General
8.0 General 8.1 Introduction This specification describes the host interface of the Travelstar 80GN. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Revision 2, dated 2 August 2001, with certain limitations described in Section 9.0, “Deviations from standard”...
Page 70 Travelstar 80GN Hard Disk Drive Specification...
Page 71: Deviations From Standard
9.0 Deviations from standard The device conforms to the referenced specifications, with deviations described below. The interface conforms to the Working Document of Information Technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Revision 3, dated 30 October 2001, with the following deviation: Standby Timer Standby timer is enabled by STANDBY command or IDLE command.
Page 72 Travelstar 80GN Hard Disk Drive Specification September 19, 2003 10:28 am...
Page 73: Register
10.0 Register Table 37: Register Set Addresses Functions CS0- CS1- READ (DIOR-) WRITE (DIOW-) Data bus high impedence Not used Control block registers Data bus high impedance Not used Data bus high impedance Not used Alternate Status Device Control Device Address Not used Command block registers Data...
Page 74: Alternate Status Register
10.1 Alternate Status Register Table 38: Alternate Status Register This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.
Page 75: Device Control Register
10.4 Device Control Register Table 39: Device Control Register SRST -IEN Definitions HOB (high order byte) is defined by the 48-bit Address feature set. A write to any Command Register shall clear the HOB bit to zero. SRST Software Reset. The device is held at reset when RST = 1. Setting RST = 0 again enables the device.
Page 76: Device/Head Register
10.6 Device/Head Register Table 41: Device Head/Register This register contains the device and head numbers. Definitions Binary encoded address mode select. When L = 0, addressing is by CHS mode. When L = 1, addressing is by LBA mode. Device. When DRV = 0, device 0 (master) is selected. When DRV = 1, device 1 (Slave) is selected.
Page 77: Features Register
10.8 Features Register This register is command specific. This register is used with the Set Features command, the S.M.A.R.T. Function Set command, and the Format Unit command. 10.9 LBA High Register This register is command specific. This is used with the Set Features command, S.M.A.R.T. Function Set com- mand and Format Unit command.
Page 78 Definitions Busy. Bit BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. DRDY Device Ready.
Page 79: General
11.0 General 11.1 Reset response ATA has the following three types of resets: The device executes a series of electrical circuitry diagnostics, spins up the Power On Reset (POR) head disk assembly, tests speed and other mechanical parametric, and sets default values.
Page 80: Register Initialization
11.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Table 45: Default Register Values Register Default Value Error Diagnostic Code Sector Count LBA Low LBA Mid LBA High Device...
Page 81: Diagnostic And Reset Considerations
11.3 Diagnostic and Reset considerations The Set Max password, the Set Max security mode and the Set Max unlock counter are not retained over a Power On Reset but are retained over a Hard Reset or Soft Reset. For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On DASP–...
Page 82: Power-Off Considerations
11.4 Power-off considerations 11.4.1 Load/Unload Load/Unload is a functional mechanism of the hard disk drive. It is controlled by the drive microcode. Specifically, unloading of the heads is invoked by the following commands. Table 48: Device behavior by ATA command Command Response Standby...
Page 83: Sector Addressing Mode
You may then turn off the drive in the following order: 1. Issue Standby Immediate or sleep command 2. Wait until COMMAND COMPLETE STATUS is returned. (It may take up to 350 ms in a typical case.) 3. Terminate power to drive This power-down sequence should be followed for entry into any system power-down state, system suspend state, or system hibernation state.
Page 84: Power Management Features
11.6 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes.
Page 85: Standby Timer
11.6.4 Standby timer The standby timer provides a method for the device to automatically enter standby mode from either active or idle mode following a host programmed period of inactivity. If the device is in the active or idle mode, the device waits for the specified time period and if no command is received, the device automatically enters the standby mode.
Page 86: Performance Idle Mode
increase with increasing advanced power management levels. The advanced power management levels contain discrete bands, described in the section of Set Feature command in detail. This feature set uses the following functions: • A SET FEATURES subcommand to enable Advanced Power Management •...
Page 87: Function
11.8 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
Page 88: Operation With Power Management Modes
11.8.6 S.M.A.R.T. operation with power management modes The device saves attribute values automatically on every head unload timing except the emergency unload, even if the attribute auto save feature is not enabled. The head unload is done not only by Standby, Standby Immediate, Sleep command, and Hard Reset, but also by the Standby timer.
Page 89: Password
The system manufacturer or dealer who intends to enable the device lock function for end users must set the master password even if only single level password protection is required. Otherwise, the default master password which is set by Hitachi Global Storage Technologies can unlock a device that is locked with a user password 11.9.4 Master Password Revision Code This Master Password Revision Code is set by Security Set Password command with the master password.
Page 90: Table 51: Usual Operation For Por
11.9.4.3 Operation from POR after user password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed. Table 51: Usual operation for POR Device Locked mode Unlock CMD Erase Prepare Non-media Access Media Access...
Page 91: Table 52: Password Lost
11.9.4.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
Page 92: Command Table
11.9.5 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. The head unload is done not only by Standby, Standby Immediate, Sleep command and Hard Reset, but also by the Standby timer Table 53: Command table for device lock operation Device Mode...
Page 93: Protected Area Function
Table 53: Command table for device lock operation Security Erase Unit Write Long Security Freeze Lock Write Multiple Write Multiple EXT Security Set Password Write Sector(s) Write Sector(s) EXT Security Unlock Write Verify Seek 11.10 Protected Area Function Protected Area Function provides a protected area which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system management information.
Page 94: Set Max Security Extension Commands
Issue Read Native Max ADDRESS command to get the real device max of LBA/CYL. Returned value shows that native device Max LBA is 0FFFFFh regardless of the current setting. Make the entire device accessible, including the protected area, by setting the device Max LBA as 0FFFFFh via Set Max ADDRESS command.
Page 95: Address Offset Feature (Vendor Specific)
This command requests a transfer of a single sector of data from the host. The figure shown above defines the content of this sector of information. The password supplied in the sector of data transferred is compared with the stored Set Max password. If the password compare fails, then the device returns command aborted and decrements the unlock counter.
Page 96: Identify Device Data
cleared by Subcommand 89h Disable Address Offset Mode, Hardware reset or Power on Reset. If Reverting to Power on Defaults has been enabled by Set Features command, it is cleared by Soft reset as well. Upon entering offset mode the capacity of the drive returned in the Identify Device data is the size of the former protected area. A subsequent Set Max Address command with the address returned by the Read Max Address command allows access to the entire drive.
Page 97: Seek Overlap
11.12 Seek Overlap The drive provides accurate seek time measurement method. The seek command is usually used to measure the device seek time by accumulating execution time for a number of seek commands. With typical implementation of the seek command, this measurement must include the device and host command overhead. To eliminate this overhead, the drive overlaps the seek command as described below.
Page 98: Reassign Function
11.14 Reassign Function The Reassign Function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. The one entry can register 256 consecutive sectors maximum. This reassignment information is registered internally, and the information is available right after completing the reassign function.
Page 99: 48-Bit Address Feature Set
11.15 48-bit Address Feature Set The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single command are increased by increasing the allowable sector count to 16 bits. •...
Page 100 Travelstar 80GN Hard Disk Drive Specification...
Page 101: Command Protocol
12.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.
Page 102: Data Out Commands
4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b. When the sector of data is available for transfer to the host, the device sets BSY = 0 and DRQ=1 and interrupts the host.
Page 103: Non-Data Commands
• Write Sector(s) EXT • Write Verify Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, LBA, and Device Registers. 2.
Page 104 • Format Unit • Idle • Idle Immediate • Initialize Device Parameters • Read Native Max ADDRESS • Read Native Max ADDRESS EXT • Read Verify Sector(s) • Read Verify Sector(s) EXT • Recalibrate • Security Erase Prepare • Security Freeze Lock •...
Page 105: Dma Data Transfer Commands
12.4 DMA Data Transfer commands: • Read DMA • Read DMA EXT • Write DMA • Write DMA EXT Data transfers using DMA commands differ in two ways from PIO transfers: • Data transfers are performed using the Slave DMA channel •...
Page 106 Travelstar 80GN Hard Disk Drive Specification page 96...
Page 107: Command Descriptions
13.0 Command descriptions The table below shows the commands that are supported by the device. Table 60: “Command Set (subcommand)” on page 99 shows the subcommands that are supported by each command or feature. Table 58: Command Set (1 of 2) Code Binary Code Bit Protocol...
Page 108: Table 59: Command Set (2 Of 2)
Table 59: Command Set (2 of 2) Binary Code Bit Proto- Code Command (Hex) 7 6 5 4 3 2 1 0 Set Features 1 1 1 0 1 1 1 1 Set Max ADDRESS 1 1 1 1 1 0 0 1 Set Max ADDRESS EXT 0 0 1 1 0 1 1 1 Set Max FREEZE LOCK...
Page 109: Table 60: Command Set (Subcommand)
Table 60: Command Set (subcommand) Command Feature Command (Subcommand) Code (Hex) Register (Hex) S.M.A.R.T. Function S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Save Attribute Values S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Log Sector S.M.A.R.T. Write Log Sector S.M.A.R.T.
Page 110 The following symbols are used in the command descriptions. Input registers This indicates that the bit is always set to 0. This indicates that the bit is always set to 1. Head number. This indicates that the head number part of the Device/Head Register is an input parameter and will be set by the device.
Page 111: Check Power Mode (E5H/98H)
13.1 Check Power Mode (E5h/98h) Table 61: Check Power Mode Commmand (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 112: Device Configuration Overlay (B1H)
13.2 Device Configuration Overlay (B1h) Table 62: Check Power Mode Command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 113: Device Configuration Identify (Subcommand C2H)
13.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) The DEVICE CONFIGURATION IDENTIFY command returns a 512 byte data structure via PIO data-in transfer. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE or IDENTIFY PACKET DEVICE command will reflect the reduced set of capabilities, while the DEVICE CONFIGURATION IDENTIFY command will reflect the entire set of selectable capabilities.
Page 114: Table 64: Device Configuration Overlay Data Structure
Table 64: Device Configuration Overlay Data structure Word Content 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-6 Reserved...
Page 115: Execute Device Diagnostic (90H)
13.3 Execute Device Diagnostic (90h) Table 66: Execute Device Diagnostic command (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 116: Flush Cache (E7H)
13.4 Flush Cache (E7h) Table 67: Flush Cache command (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 117: Flush Cache Ext (Eah)
13.5 Flush Cache EXT (EAh) Table 68: Flush Cache command (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 118: Format Track (50H: Vendor Specific)
13.6 Format Track (50h: vendor specific) Table 69: Format Track command (50h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 119: Format Unit (F7H: Vendor Specific)
13.7 Format Unit (F7h: vendor specific) Table 70: Format Unit command (F7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 120: Identify Device (Ech)
13.8 Identify Device (ECh) Table 71: Identify Device command (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 121: Table 72: Identify Device Information. (Part 1 Of 7)
Table 72: Identify device information. (Part 1 of 7) Word Content Description 045AH drive classi- bit assignments fication 15(=0) 1=ATAPI device, 0=ATA device 14(=0) 1=format speed tolerance gap required 13(=0) 1=track offset option available 12(=0) 1=data strobe offset option available 11(=0) 1=rotational speed tolerance >...
Page 122: Table 73: Identify Device Information. (Part 2 Of 7)
Table 73: Identify device information. (Part 2 of 7) Word Content Description 0000H * Capable of double word I/O, '0000'= cannot perform 0F00H Capabilities, bit assignments: 15-14(=0) Reserved 13(=0) Standby timer value are vendor specific 12(=0) Reserved 11(=1) IORDY Supported 10(=1) IORDY can be disabled 9(=1)
Page 123: Table 74: Identify Device Information. (Part 3 Of 7)
Table 74: Identify device information. (Part 3 of 7) Word Content Description 0003H Flow Control PIO Transfer Modes Supported 15- 8(=0) Reserved 7- 0(=3) Advanced PIO Transfer Modes Supported '11' = PIO Mode 3 and 4 Supported 0078H Minimum Multiword DMA Transfer Cycle Time Per Word 15- 0(=78h) Cycle time in nanoseconds (120 ns, 16.6 MB/s) 0078H Manufacturer's Recommended Multiword DMA Transfer Cycle Time...
Page 124: Table 75: Identify Device Information. (Part 4 Of 7)
Table 75: Identify device information. (Part 4 of 7) Word Content Description 7FE8H Command set supported 15(=0) Always 14(=1) Always 13(=1) 1=FLUSH CACEH EXT command supported 12(=1) 1=FLUSH CACHE command supported 11(=1) 1=Device Configuration Overlay command supported 10(=1) 1=48-bit Address feature set supported 9(=1) 1=Automatic Acoustic Management supported ** 8(=1)
Page 125: Table 76: Identify Device Information
Table 76: Identify device information. (Part 5 of 7 Word Content Description 0XXXH Command set/feature enabled 15-14(=0) Reserved 13(=1) 1=FLUSH CACHE EXT command supported 12(=1) 1=FLUSH CACHE command supported 11(=x) 1=Device Configuration Overlay supported 10(=1) 1=48-bit Address feature set supported 9(=X) 1=Automatic Acoustic Management enabled 8(=X)
Page 126: Table 77: Identify Device Information. (Part 6 Of 7)
Table 77: Identify device information. (Part 6 of 7) Word Content Description 40XXH Current Advanced Power Management level 15- 8(=40h) Reserved 7- 0(=xxh) Current Advanced Power Management level set by Set Features Command (01h to FEh) XXXXH Current Master Password Revision Codes XXXXH Hardware reset results 15-13...
Page 127: Table 78: Identify Device Information. (Part 7 Of 7)
Table 78: Identify device information. (Part 7 of 7) Word Content Description 0XXXH Security Mode Feature. Bit assignments 15-9(=0) Reserved 8(=X) Security Level: 1= Maximum, 0= High 7-6(=0) Reserved 5(=0) 1=Enhanced security erase supported 4(=0) 1=Security count expired 3(=0) 1=Security Frozen 2(=0) 1=Security Locked 1(=0)
Page 128: Table 79: Number Of Cylinders/Heads/Sectors By Model
Table 79: Number of cylinders/heads/sectors by model. Microcode revision MRxOAxxx IC25N080ATMR04-0 Number of cylinders 3FFFh Number of heads Buffer size 3D98h (=7,884KB) Total number of user 950F8B0h addressable sectors IC25N060ATMR04-0 Number of cylinders 3FFFh Number of heads Buffer size 3D98h(=7,884KB) Total number of user 6FC7C80h addressable sectors...
Page 129: Idle (E3H/97H)
13.9 Idle (E3h/97h) Table 80: Idle command (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 130: Idle Immediate (E1H/95H)
13.10 Idle Immediate (E1h/95h) Table 81: Idle Immediate command (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 131 Travelstar 80GN Hard Disk Drive Specification...
Page 132: Initialize Device Parameters (91H)
13.11 Initialize Device Parameters (91h) Table 82: Initialize Device Parameters command (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 133: Read Buffer (E4H)
13.12 Read Buffer (E4h) Table 83: Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 134: Read Dma (C8H/C9H)
13.13 Read DMA (C8h/C9h) Table 84: Read DMA command (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 135 Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. LBA Low This indicates the sector number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 0–7.
Page 136: Read Dma Ext (25H)
13.14 Read DMA EXT (25h) Table 85: Read DMA EXT (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 137 Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0)
Page 138: Read Long (22H/23H)
13.15 Read Long (22h/23h) Table 86: Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 139 LBA Low This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7. (L = 1) LBA High/Low This indicates the cylinder number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 8–15 (Low), 16–23 (High).
Page 140: Read Multiple (C4H)
13.16 Read Multiple (C4h) Table 87: Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 141 LBA High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 8–15 (Mid), 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 24–27.
Page 142: Read Multiple Ext (29H)
13.17 Read Multiple EXT (29h) Table 88: Read Multiple EXT (29h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 143: Read Native Max Address (F8H)
13.18 Read Native Max ADDRESS (F8h) Table 89: Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 144: Read Native Max Address Ext (27H)
13.19 Read Native Max ADDRESS EXT (27h) Table 90: Read Native Max ADDRESS EXT (27h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 145: Read Sectors (20H/21H)
13.20 Read Sectors (20h/21h) Table 91: Read Sectors (20h/21h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 146: Read Sector(S) Ext (24H)
13.21 Read Sector(s) EXT (24h) Table 92: Read Sector(s) EXT Command (24h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 147 Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0)
Page 148: Read Verify Sectors (40H/41H)
13.22 Read Verify Sectors (40h/41h) Table 93: Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 149 LBA High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High).(L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 150: Ready Verify Sector(S) Ext (42H)
13.23 Ready Verify Sector(s) EXT (42h) Table 94: Read Verify Sector(s) EXT Command (42h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 151 Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0)
Page 152: Recalibrate (1Xh)
13.24 Recalibrate (1xh) Table 95: Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 153: Security Disable Password (F6H)
13.25 Security Disable Password (F6h) Table 96: Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 154: Security Disable Password (F6H)
13.26 Security Disable Password (F6h) Table 98: Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 155: Security Erase Unit (F4H)
13.27 Security Erase Unit (F4h) Table 99: Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 156 This command disables the security mode feature (device lock function), however, the master password is still stored internally within the device and may be reactivated later when a new user password is set. If you execute this command on disabling the security mode feature (device lock function), the password sent by the host is NOT compared with the Master Password and the User Password.
Page 157: Security Freeze Lock (F5H)
13.28 Security Freeze Lock (F5h) Table 101: Security Freeze Lock (F5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 158: Security Set Password (F1H)
13.29 Security Set Password (F1h) Table 102: Security Set Password (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 159 Security Level A zero indicates a High level, a one indicates a Maximum level. If the host sets the High level and the password is forgotten then the Master Password can be used to unlock the device. If the host sets the Maximum level and the user password is forgotten, only a Security Erase Prepare/Security Unit command can unlock the device and all data will be lost.
Page 160: Security Unlock (F2H)
13.30 Security Unlock (F2h) Table 104: Security Unlock (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 161: Seek (7Xh)
13.31 Seek (7xh) Table 105: Seek (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 162: Sense Condition (F0H: Vendor Specific)
13.32 Sense Condition (F0h: vendor specific) Table 106: Sense Condition (F0h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 163: Set Features (Efh)
13.33 Set Features (EFh) Table 107: Set Features (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 164 Note 1. When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. PIO Default Transfer Mode 00000 000 PIO Default Transfer Mode, Disable IORDY 00000 001...
Page 165: Set Max Address (F9H)
13.34 Set Max ADDRESS (F9h) Table 108: Set Max ADDRESS (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 166 If a host protected area has been established by a Set Max Address Ext command, the device shall return command aborted.Output parameters to the device. Feature Destination code for this command SET MAX SET PASSWORD SET MAX LOCK SET MAX UNLOCK SET MAX FREEZE LOCK When the Set Max ADDRESS command is executed, this register is ignored.
Page 167: Set Max Address Ext (37H)
13.35 Set Max ADDRESS EXT (37h) Table 109: Set Max ADDRESS EXT Command (37h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 168 Output parameters to the device Option bit for selection whether nonvolatile or volatile. B=0 is volatile condition. When B=1, MAX Address which is set by Set Max Address Ext command is preserved by POR. When B=0, MAX Address which is set by Set Max Address Ext command will be lost by POR.
Page 169: Set Multiple (C9H)
13.36 Set Multiple (C9h) Table 110: Set Multiple command (C6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 170: Sleep (E6H/99H)
13.37 Sleep (E6h/99h) Table 111: Sleep (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 171: Function Set (B0H)
13.38 S.M.A.R.T. Function Set (B0h) Table 112: S.M.A.R.T. Function Set (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 172: Function Subcommands
13.38.1 S.M.A.R.T. Function Subcommands 13.38.1.1 S.M.A.R.T. Read Attribute Values (subcommand D0h) This subcommand returns the device's Attribute Values to the host. Upon receipt of the S.M.A.R.T. Read Attribute Values subcommand from the host, the device asserts BSY, saves any updated Attribute Values to the Attribute Data sectors, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Value information from the device via the Data Register.
Page 173 13.38.1.5 S.M.A.R.T. Execute Off-line Immediate (subcommand D4h) This subcommand causes the device to immediately initiate the set of activities that collect Attribute data in an off- line mode (off-line routine) or execute a self-test routine in either captive or off-line mode. The LBA Low register shall be set to specify the operation to be executed.
Page 174 S.M.A.R.T.—either enabled or disabled—will be preserved by the device across power cycles. Once enabled, the receipt of subsequent S.M.A.R.T. Enable Operations subcommands will not affect any of the Attribute Values. Upon receipt of the S.M.A.R.T. Enable Operations subcommand from the host, the device asserts BSY, enables S.M.A.R.T.
Page 175 The Sector Count register shall be set to specify the feature to be enabled or disabled: Sector Count Feature Description Disable Automatic Off-line Disable Off-line Read Scanning Enable Automatic Off-line Enable Off-line Read Scanning A value of zero written by the host into the device's Sector Count register before issuing this subcommand shall cause the automatic off-line data collection feature to be disabled.
Page 176: Device Attribute Data Structure
13.38.2 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specification for byte ordering, namely, that the least significant byte occupies the lowest numbered byte address location in the field.
Page 177: Individual Attribute Data Structure
13.38.2.2 Individual Attribute Data Structure The following defines the 12 bytes that make up the information for each Attribute entry in the Device Attribute Data Structure. Description Byte Offset Value Attribute ID Number (01h to FFh) binary Status Flags bit flags Bit 0 Pre-Failure/Advisory Bit 1...
Page 178: Table 114: Status Flag Definitions
Table 114: Status Flag definitions Flag Name Definition Pre-Failure/ If bit = 0, an Attribute Value less than or equal to its Advisory bit corresponding Attribute Threshold indicates an Advisory condition where the usage or age of the device has exceeded its intended design life period.
Page 179 13.38.2.4 Self-test execution status Definition Percent Self-test remaining. An approximation of the percent of the self-test routine remaining until completion given in ten percent increments. Valid values are 0 through 9. Current Self-test execution status. 0 The self-test routine completed without error or has never been run. 1 The self-test routine was aborted by the host.
Page 180 Off-line Read Scanning implemented bit The device does not support Off-line Read Scanning The device supports Off-line Read Scanning Self-test implemented bit Self-test routing is not implemented Self-test routine is implemented Reserved (0) 13.38.2.8 S.M.A.R.T. Capability This word of bit flags describes the S.M.A.R.T. capabilities of the device. The device will return 03h indicating that the device will save its Attribute Values prior to going into a power saving mode and supports the S.M.A.R.T.
Page 181: Device Attribute Thresholds Data Structure
13.38.3 Device Attribute Thresholds data structure The following defines the 512 bytes that make up the Attribute Threshold information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Thresholds. All multibyte fields shown in these data structures follow the ATA-3 specification for byte ordering, that is, that the least significant byte occu- pies the lowest numbered byte address location in the field.
Page 182: Error Log Sector
13.38.3.3 Attribute ID Numbers Attribute ID Numbers supported by the device are the same as Attribute Values Data Structures. 13.38.3.4 Attribute Threshold These values are preset at the factory and are not meant to be changeable. However, the host might use the "S.M.A.R.T.
Page 183: Table 118: Command Data Structure
13.38.4.5 Command data structure Data format of each command data structure is shown below. Table 118: Command data structure Description Byte Offset Device Control register Features register Sector count register LBA Low register LBA Mid register LBA High register Device register Command register Time stamp (milliseconds from Power On)
Page 184: Self-Test Log Data Structure
13.38.5 Self-test log data structure The following defines the 512 bytes that make up the Self-test log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Table 120: Self-test log data structure Description Byte Offset Data structure revision...
Page 185: Error Reporting
13.38.6 Error reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device. Table 121: S.M.A.R.T. Error Codes Error condition Status Register Error Register A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the LBA High and LBA Mid registers.
Page 186: Standby (E2H/96H)
13.39 Standby (E2h/96h) Table 122: Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 187: Standby Immediate (E0H/94H)
13.40 Standby Immediate (E0h/94h) Table 123: Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 188: Write Buffer (E8H)
13.41 Write Buffer (E8h) Table 124: Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 189: Write Dma (Cah/Cbh)
13.42 Write DMA (CAh/CBh) Table 125: Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 190 LBA Low This indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7. (L = 1) LBA High/Mid This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High).
Page 191: Write Dma Ext (35H)
13.43 Write DMA EXT (35h) Table 126: Write DMA (35h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 192 LBA High Current LBA (23-16) LBA High Previous LBA (47-40) Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1)
Page 193: Write Long (32H/33H)
13.44 Write Long (32h/33h) Table 127: Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 194 LBA High/Mid This indicates the cylinder number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 8–15 (Mid) and bits 16–23 (High). (L = 1) This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 24–27.
Page 195: Write Multiple (C5H)
13.45 Write Multiple (C5h) Table 128: Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 196: Write Multiple Ext (39H)
13.46 Write Multiple EXT (39h) Write Multiple EXT (39h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 197 Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0)
Page 198: Write Sectors (30H/31H)
13.47 Write Sectors (30h/31h) Table 129: Write Sectors Command (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 199 LBA High/Mid This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 200: Write Sectors(S) Ext (34H)
13.48 Write Sectors(s) EXT (34h) Table 130: Write Sector(s) EXT Command (34h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 201: Write Verify (3Ch: Vendor Specific)
Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0)
Page 202 Travelstar 80GN Hard Disk Drive Specification...
Page 203: Time-Out Values
14.0 Time-out values The timing of BSY and DRQ in Status Register are shown in the table below. Table 131: Time-out values INTERVAL START STOP TIME-OUT Power On Device Busy After Power On Status Register BSY=1 400 ns Power On Device Ready After Power On Status Register BSY=0...
Page 204 We recommend that the host system execute Soft reset and then retry to issue the command if the host sys- tem time-out would occur for the device. Note 1. For SECURITY ERASE UNIT command, the execution time is referred to 13.27, “Security Erase Unit (F4h)”...
Page 205: Appendix
15.0 Appendix 15.1 Commands Support Coverage The table below compares the command support coverage of the Travelstar 80GN with the ATA-6 defined command set. The third column indicates the capability of the Travelstar 80GN for those commands. Table 132: Command coverage (1 of 2) Implementation for ATA-6 Category Code...
Page 206: Table 133: Command Coverage (2 Of 2)
Table 133: Command coverage (2 of 2) Implementation for ATA-6 Category Code Command Name Travelstar 80GN Type READ DMA Mandatory READ DMA Obsoleted WRITE DMA Mandatory WRITE DMA Obsoleted WRITE DMA QUEUED Optional CFA WRITE MULTIPLE W/O ERASE Optional (Note 7) GET MEDIA STATUS Optional (Note 7) MEDIA LOCK...
Page 207: Table 134: Set Features Command Coverage
Note 4. Power Management Feature Set Note 5. S.M.A.R.T. Function Set Note 6. Security Mode Feature Set Note 7. Removable 15.2 SET FEATURES Commands Support Coverage The following table provides a list of Feature Registers, Feature Names, and implementation for the Travelstar 80GN.
Page 208 15.3 Changes from Travelstar 60GH and 40GN The changes between the Travelstar 60GH & 40-GN and the Travelstar 80GN are listed below: • Identify device information data Travelstar 80GN Hard Disk Drive Specification...
Page 209 Travelstar 80GN Hard Disk Drive Specification...
Page 210 Travelstar 80GN Hard Disk Drive Specification...
Page 211 Hitachi Global Storage Technologies Index Discrete tone penalty ........36 Drive Address Register .........65 Drive address setting ........55 Drive characteristics ........15 Abbreviations ..........5 Drive handling precautions ......8 Acoustics ............35 Drive ready time ...........19 Address Offset Feature .........85 Advanced Power Management (ABLE-3) feature Electrical interface specification ....39...
Page 212 Mechanical positioning .........17 Mechanical specifications ......31 S.M.A.R.T. Function ........77 Mode transition time ........20 Set ............160 Mounting hole locations .......32 Safety ............37 Mounting orientation ........33 Secondary circuit protection ......37 Sector Addressing Mode .......73 Sector Count Register ........67 Non-data commands ........93 Sectors/Track ..........16 Security Disable Password ......142 Operating modes Security Erase Unit ........144...
Page 213 Hitachi Global Storage Technologies Vibration ............33 Write Buffer ..........177 Write Cache function ........87 Zone ..............16...
Page 214 References in this publication to Hitachi Global Storage Technologies products, programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Stor- age Technologies operates. Product information is provided for information purposes only and does not constitute a warranty.

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Hitachi IC25N040ATMR04-0 - Travelstar 40GB Laptop Hard Drive 9.5mm 2.5 Inch Notebook HDD Specifications

1 General

2 Outline of the Drive

3 Fixed-Disk Subsystem Description

4 Drive Characteristics

5 Data Integrity

6 Specification

7 Electrical Interface Specification

8 General

9 Deviations from Standard

10 Register

11 General

12 Command Protocol

13 Command Descriptions

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Summary of Contents for Hitachi IC25N040ATMR04-0 - Travelstar 40GB Laptop Hard Drive 9.5mm 2.5 Inch Notebook HDD