7.2.3 Multiword DMA timings
The Multiword DMA timing meets Mode 2 of the ATA/ATAPI-4 description.
CS0-/CS1-
DMARQ
DMACK-
DIOR-/DIOW-
READ DATA
WRITE DATA
Figure 24. Multiword DMA cycle timing chart
PARAMETER DESCRIPTION
t0
Cycle time
tD
DIOR–, DIOW– pulse width
tE
DIOR– data access
tF
DIOR– data hold
tG
DIOR–/DIOW– data setup
tH
DIOW– data hold
tI
DMACK– to –DIOR/–DIOW setup
tJ
DIOR–/DIOW– to DMACK- delay
tK
DIOR–/DIOW– negated pulse width
tL
DIOR–/DIOW– to DMARQ– delay
tM
CS (1:0) valid to DIOR–/DIOW–
tN
CS (1:0) hold
tZ
–DMACK to tristate
Figure 25. Multiword DMA cycle timings
tM
tI
tD
tG
tG
Deskstar 40GV & 75GXP hard disk drive specifications
tL
t0
tK
tF
tH
MIN (ns)
120
70
50
5
20
10
0
5
25
–
25
10
–
31
tN
tJ
tZ
MAX (ns)
–
–
–
–
–
–
–
–
–
35
–
–
25