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IBM DTNA-22160 - Travelstar 2.1 GB Hard Drive Specifications

(1800/2160 mb) 2.5-inch hard disk drive with ata interface
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S46H-5175-03
OEM HARD DISK DRIVE SPECIFICATIONS
for
DTNA-21800/22160 (1800/2160 MB)
2.5-Inch Hard Disk Drive with ATA Interface
Revision (1.2)

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  • Page 1 S46H-5175-03 OEM HARD DISK DRIVE SPECIFICATIONS DTNA-21800/22160 (1800/2160 MB) 2.5-Inch Hard Disk Drive with ATA Interface Revision (1.2)
  • Page 3 S46H-5175-03 OEM HARD DISK DRIVE SPECIFICATIONS DTNA-21800/22160 (1800/2160 MB) 2.5-Inch Hard Disk Drive with ATA Interface Revision (1.2)
  • Page 4 This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of the publication. IBM may make improvements and/or changes in the product(s) and/or the program(s) described in this publication at any time.

  • Page 5: Table Of Contents

    ........Copyright IBM Corp. 1997...
  • Page 6 5.5 Vibration and Shock ..........5.5.1 Operating Vibration .
  • Page 7 9.11 Sector Count Register ......... . . 9.12 Sector Number Register .
  • Page 8 12.7 Idle (E3h/97h) ..........12.8 Idle Immediate (E1h/95h) .

  • Page 9: General

    1.0 General This document describes the specifications of the following IBM 2.5-inch, ATA interface hard disk drives: DTNA-21800 (1800 MB) DTNA-22160 (2160 MB) Note: The specifications are subject to change without notice. 1.1 Glossary Word Meaning Kbpi 1 000 Bit Per Inch...

  • Page 10: Caution Of Usage

    1.2.1 Caution of usage Figure 1. Handling and attachment caution of DTNA-21800/22160 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...
  • Page 11 Figure 2. Breathing hole caution of DTNA-21800/22160 General...
  • Page 12 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 13: General Features

    Adaptive power save control (0.85 Watt at low-power idle state) 2.8 sec Power on to ready Shock Non-operation : 500G/2ms Operation : 100G/2ms Note: Hole position of mounting screw is different from previous IBM 2.5" HDDs such as DMCA-2xxxx, DCRA-2xxxx, DSOA-2xxxx, DPRA-2xxxx, etc. Copyright IBM Corp. 1997...
  • Page 14 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 15: Part 1. Functional Specification

    Part 1. Functional Specification Copyright IBM Corp. 1997...
  • Page 16 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 17: Drive Characteristics

    Average latency [ msec] Recording density [ Kbpi] 147.8 Maximum Track density [ TPI] 8670 Areal density [ Mb/sq.in.] 1280 Maximum Number of zone Number of disks Number of heads 5 / 6 Servo design method Embedded sector servo Copyright IBM Corp. 1997...

  • Page 18: Performance Characteristics

    3.3 Performance Characteristics File performance is characterized by the following parameters: Command Overhead Mechanical Positioning Seek Time Latency Data Transfer Speed Buffering Operation Note: All the above parameters contribute to a file performance. There are other parameters which con- tribute to the performance on the actual system. This specification tries to define the essential file character- istics, not the system throughput which is dependent on the system and the application.

  • Page 19: Single Track Seek Time

    The seek time is measured from the start of motion of the actuator to the start of a reliable read or write operation. Reliable read or write implies that error correction/recovery is not employed to correct for arrival problems. The Average Seek Time is measured as the weighted average of all possible seek combinations. m a x S U M ( m a x + 1 n ) ( T n .

  • Page 20: Full Stroke Seek

    3.3.4 Full Stroke Seek Function Typical Read 23.0 msec 30.0 msec Write 24.0 msec 31.0 msec Figure 8. Full Stroke Seek Time Full stroke seek is measured as the average of 1000 full stroke seeks. 3.3.5 Average Latency Time for a revolution Average Latency 4000 15.0 msec...

  • Page 21: Operating Modes

    3.3.7 Operating Modes. O p e r a t i n g m o d e D e s c r i p t i o n S p i n U p S t a r t u p t i m e p e r i o d f r o m s p i n d l e s t o p o r p o w e r d o w n . S e e k S e e k o p e r a t i o n m o d e W r i t e...
  • Page 22 3.3.7.2 Operating mode at power on The device goes to Idle mode after power on or hard reset as an initial state. Initial state may be changed to Standby mode using pin 47 on the interface connector. Refer to 6.8, “ Drive Address Setting” on page 41 for detail.

  • Page 23: Data Integrity

    Appropriate error status is made available to the host system if any of the following conditions occur after the drive has once become ready: Spindle speed outside requirements for reliable operation. Occurrence of a WRITE FAULT condition. Copyright IBM Corp. 1997...

  • Page 24: Write Safety

    4.4 WRITE Safety The drive ensures that the data is written into the disk media properly. Following conditions are monitored during a write operation. When one of those conditions exceeds the criteria, the write operation is terminated and automatic retry sequence will be invoked. Head off track External shock Low supply voltage...

  • Page 25: Recovered Read Errors

    4.7.3 Recovered Read Errors When a read operation for a sector failed once then recovered at the specific E R P step, this sector is reallo- cated automatically. A media verification sequence may be run prior to the reallocation according to the pre-defined conditions.
  • Page 26 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 27: Specification

    The system has to provide sufficient ventilation to maintain a surface temperature below 60[ ˚ C] at the center of the top cover of the drive, and below 60[ ˚ C] at the center of the top cover of the drive. Non-operating condition should not continue beyond one year. Copyright IBM Corp. 1997...

  • Page 28: Magnetic Fields

    5.1.2 Magnetic Fields The disk drive will withstand radiation & conductive noise within the limits shown below. 5.1.2.1 Radiation Noise The disk drive shall work without degradation of the soft error rate under the following Magnetic Flux Density Limits at the enclosure surface. Frequency ( KHz ) Limits ( Gauss rms ) 0 - 60...

  • Page 29: Dc Power Requirements

    5.2 DC Power Requirements Connection to the product should be made in isolated secondary circuits (SELV). The voltage specifications are applied at the power connector of the drive. Item Requirements Notes Nominal Supply + 5 Volt Power Supply Ripple ( 0- 20Mhz) 100 mv p-p max Tolerance + / - 5 %...

  • Page 30: Start Up Current

    5.2.1 Start Up Current Figure 16. Typical current wave form at start up. O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 31: Reliability

    5.3 Reliability 5.3.1 Contact Start Stop (CSS) The drive is designed to withstand a minimum of 52,000 contact start/stop cycles under 40˚ C with 15-20% humidity. The drive is designed to withstand a minimum of 10,400 contact start/stop cycles under 55˚ C with 8-15% humidity.

  • Page 32: Mechanical Specifications

    5.4 Mechanical Specifications 5.4.1 Mechanical Dimensions and Weight The following chart describes the dimensions for the 2.5" hard disk drive form factor. DTNA-21800 / DTNA-22160 Height (mm) 12.7 +0.0/-0.5 Width (mm) 69.85 ± 0.25 Length (mm) 100.2 ± 0.25 Weight (gram) 140 Max Figure 17.

  • Page 33: Mounting Orientation

    5.4.3 Mounting Orientation The drive will operate in all axes (6 directions). The drive will operate within the specified error rates when tilted ± 5 degree from these positions. Performance and error rate will stay within specification limits if the drive is operated in the other permis- sible orientations from which it was formatted.

  • Page 34: Vibration And Shock

    5.5 Vibration and Shock All vibration and shock measurements in this section shall be for the disk drive without the mounting attach- ments for the systems. The input level shall be applied to the normal drive mounting points. 5.5.1 Operating Vibration The disk drive will operate without a hard error while being subjected to the following vibration levels.

  • Page 35: Operating Shock

    5.5.2.2 Swept Sine Vibration - 25.4mm (peak to peak) displacement, 5 to 10 to 5 Hz - 5 G (zero to peak), 10 to 500 to 10 Hz sine wave - 0.5 oct/min sweep rate 5.5.3 Operating Shock The hard disk drive meets the following criteria while operating in the conditions described below. The shock test consists of ten shock inputs in each axis and direction for a total of 60.

  • Page 36: Acoustics

    5.6 Acoustics 5.6.1 Sound Power Level The criteria of A-weighted sound power level is described below. Measurements are to be taken in accordance with ISO 7779. The mean of 40 drives is to be less than the typical value. Each drive is to be less than the maximum value. Drives are to meet this requirement in both board down orientations.

  • Page 37: Discrete Tone Penalty

    5.6.2 Discrete Tone Penalty Discrete tone penalties are added to the A-weighted sound power (Lw) with following formula only when determining compliance. Lwt(spec)=Lw+0.1*Pt+0.3 < 4.0 (Bels) where: : A-weighted sound power level. : Value of discrete tone penalty = dLt-6.0 (dBA) : Tone-to-noise ratio taken in accordance with ISO 7779.

  • Page 38: Identification

    5.7.1 Labels The following labels are affixed to every disk drive . A label placed on the top of the HDA containing the statement 'Made by IBM' or equivalent, Part No., EC No. and F R U No. A bar code label placed on the disk drive based on user request. The location on the disk drive is to be designated in the drawing.

  • Page 39: Safety

    5.9 Safety 5.9.1 Underwriters Lab(UL) Approval DTNA-21800/22160 complies with UL 1950. 5.9.2 Canadian Standards Authority(CSA) Approval DTNA-21800/22160 complies with CSA C22.2, #950-M1993. 5.9.3 IEC Compliance DTNA-21800/22160 complies with IEC 950. 5.9.4 German Safety Mark DTNA-21800/22160 are approved by TUV on Test Requirement: EN 60 950:1988/A1:1990/A2:1991.
  • Page 40 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 41: Electrical Interface Specifications

    Note 1 : Pin position 20 is left blank for correct connector insertion. Note 2 : Pin position 47 through 50 are used for drive address setting. (Refer to Figure 26 on page 41 for address setting.) Copyright IBM Corp. 1997...

  • Page 42: Signal Definition

    6.3 Signal Definition The pin assignments of interface signals are as follows: P I N S I G N A L I / O T y p e P I N S I G N A L I / O T y p e H R E S E T T T L...

  • Page 43: Signal Description

    6.4 Signal Description HD00-HD15 16-bit bi-directional data bus between the host and the HDD. The lower 8 lines, HD00-07, are used for Register and ECC access. All 16 lines, HD00-15, are used for data transfer. These are Three-State lines that have a 24 mA current sink capability. HA00-HA02 Address used to select the individual register in the HDD.
  • Page 44 450msec for drive 1 to assert -DASP. If drive 1 is not present, drive 0 may assert -DASP to drive a LED indicator. -DASP shall be negated following acceptance of the first valid command by drive 1 or after 31 seconds, whichever comes first. Anytime after negation of -DASP, either drive may assert -DASP to indicate that a drive is active.

  • Page 45: Interface Logic Signal Levels

    6.5 Interface Logic Signal Levels The interface logic signal have the following electrical specifications: I n p u t s I n p u t H i g h V o l t a g e 2 . 0 V m i n . / V c c + 0 . 7 V m a x . I n p u t L o w V o l t a g e 0 .

  • Page 46: Pio Timings

    6.7 PIO Timings The PIO cycle timings meet Mode 4 of the ATA-3 description. H C S 0 , H C S 1 + H A 0 2 < > < T 1 > < > H I O R , H I O W <...

  • Page 47: Dma Timings (Single Word)

    6.7.1 DMA Timings (Single Word) The Single Word D M A timing meets Mode 2 of the ATA-3 description. + D M A R Q < > < > : D M A C K > T I < > T J < H I O R / H I O W <...

  • Page 48: Dma Timings (Multiword)

    6.7.2 DMA Timings (Multiword) The Multiword D M A timing meets Mode 2 of the ATA-3 description. D M A R Q < T L > D M A C K < > > T J < > T I < >...

  • Page 49: Drive Address Setting

    6.8 Drive Address Setting A jumper is available at the interface connector to determine the drive address. The set position of the jumper is as shown in Figure 26. Using Cable Selection, the drive address depends on the condition of pin 28 of the AT interface cable. In the case when pin 28 is ground or low, the drive is a Master.

  • Page 50: Addressing Of Drive Registers

    The -HCS0 is used to address Command Block registers. while the -HCS1 is used to address Control Block registers. The following table shows the standard I/O address range for IBM PC-AT machines. A d d r . C S 0...

  • Page 51: Part 2. Ata Interface Specification

    Part 2. ATA Interface Specification Copyright IBM Corp. 1997...
  • Page 52 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 53: General

    Host indicates the system that the device is attached to. First Command The command which is executed first right after power on reset or hard reset when the initial power mode at power on is Standby mode. Copyright IBM Corp. 1997...
  • Page 54 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 55: Deviations From Standard

    | SMART Return Status SMART R E T U R N STATUS subcommand does not check advisory attributes. That is, the device will not report threshold exceeded condition unless prefailure attri- butes exceed their corresponding thresholds. For example, Power-On Hours Attribute never results in negative reliability status. Copyright IBM Corp. 1997...
  • Page 56 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 57: Registers

    The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. 9.1 Alternate Status Register Copyright IBM Corp. 1997...

  • Page 58: Command Register

    A l t e r n a t e S t a t u s R e g i s t e r B S Y R D Y D S C D R Q C O R I D X E R R Figure 29.

  • Page 59: Device Control Register

    9.6 Device Control Register D e v i c e C o n t r o l R e g i s t e r S R S T I E N Figure 30. Device Control Register Bit Definitions SRST (RST) Software Reset.

  • Page 60: Error Register

    D e v i c e / H e a d R e g i s t e r D R V H S 3 H S 2 H S 1 H S 0 Figure 32. Device/Head Register This register contains the device and head numbers. Bit Definitions Binary encoded address mode select.

  • Page 61: Features Register

    TK0NF (T0N) Track 0 Not Found. T 0 N = 1 indicates track 0 was not found during a Recalibrate command. AMNF (AMN) Address Mark Not Found. A M N = 1 indicates the data address mark has not been found after finding the correct ID field for the requested sector.
  • Page 62 Bit Definitions Busy. B S Y = 1 whenever the device is accessing the registers. The host should not read or write any registers when B S Y = 1 . If the host reads any register when B S Y = 1 , the contents of the Status Register will be returned. DRDY (RDY) Device Ready.

  • Page 63: General Operation Descriptions

    ( * 5 ) e x e c u t e n o t e x e c u t e Figure 35. Reset Response Table Note. (*1) Execute after the data in write cache has been written. Copyright IBM Corp. 1997...
  • Page 64 (*2) Default value on P O R is shown in Figure 36 on page 57. (*3) The Set Features command with Feature register = CCh enables the device to revert these parameters to the power on defaults. (*4) In the case of sleep mode, the device goes to idle mode. In other case, the device does not change current mode.

  • Page 65: Register Initialization

    10.1.1 Register Initialization R e g i s t e r D e f a u l t V a l u e E r r o r D i a g n o s t i c C o d e S e c t o r C o u n t 0 1 h S e c t o r N u m b e r...

  • Page 66: Diagnostic And Reset Considerations

    10.2 Diagnostic and Reset considerations For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset DASP- is read by Device 0 to determine if Device 1 is present. If Device 1 is present Device 0 shall read PDIAG- to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error, otherwise Device 0 clears the BSY bit whenever it is ready to accept commands.

  • Page 67: Sector Addressing Mode

    10.3 Sector Addressing Mode All addressing of data sectors recorded on the device's media is by a logical sector address. The logical CHS address for DTNA-xxxxx is different from the actual physical CHS location of the data sector on the disk media.

  • Page 68: Power Management Feature

    10.4 Power Management Feature The power management feature set permits a host to modify the behavior of a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enable a device to implement low power consumption modes.

  • Page 69: Standby Timer

    5. Wait 1.5 Sec to spindle motor is stopped 6. Perform post process 10.4.4 Standby timer The standby timer provides a method for the device to automatically enter standby mode from either active or idle mode following a host programmed period of inactivity. If the device is in the active or idle mode, the device waits for the specified time period and if no command is received, the device automatically enters the standby mode.

  • Page 70: Adaptive Power Management Feature

    10.5 Adaptive Power Management Feature This feature is developed to improve the power consumption and performance in mobile hard drives. This power management technology intelligently manages power modes within the device by adapting to the indi- vidual users recent disk access pattern. DTNA-xxxxx support this feature. This feature has two-stage idle mode.

  • Page 71: Function

    10.6 S.M.A.R.T. Function The intent of Self-monitoring, analysis and reporting technology (S.M.A.R.T) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault con- dition.

  • Page 72: Operation With Power Management Modes

    10.6.6 S.M.A.R.T. operation with power management modes It is recommended that, when a host system utilizes both the power management and S.M.A.R.T. features, the system enable the device's attribute autosave feature to allow the device's automatic attribute saving upon receipt of STANDBY IMMEDIATE or SLEEP commands. If the device has been set to utilize the standby timer, the devce also saves attributes values prior to going from an Idle state to Standby state.

  • Page 73: Security Mode Feature Set

    10.7 Security Mode Feature Set Security Mode Feature Set is powerful security feature. With a device lock password, user can prevent unau- thorized access to hard disk device even if the device is removed from the computer. New commands are supported for this feature as below. Security Set Password ('F1'h) Security Unlock...

  • Page 74: Operation Example

    The system manufacturer/dealer who intend to enable the device lock function to the end users, must be set the master password even if only single level password protection is required. Otherwise, the 'default' master password which is set by IBM can unlock the device which is locked with user password. 10.7.4 Operation example 10.7.4.1 Master Password setting...
  • Page 75 10.7.4.3 Operation from POR after User Password is set When Device Lock Function is enabled, the device rejects media access command until an Security Unlock command is successfully completed. P O R > D e v i c e L o c k e d m o d e <...

  • Page 76: User Password Lost

    10.7.4.4 User Password Lost If the User Password is forgotten and High level security is set, the system user can't access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.

  • Page 77: Command Table

    10.7.5 Command Table This table shows the device's response to commands when the Security Mode Feature Set (Device lock func- tion) is enabled. D e v i c e D e v i c e D e v i c e C o m m a n d L o c k e d U n l o c k F r o z e n M o d e...
  • Page 78 D e v i c e D e v i c e D e v i c e C o m m a n d L o c k e d U n l o c k F r o z e n M o d e M o d e M o d e...

  • Page 79: Protected Area Function (Vendor Specific)

    10.8 Protected Area Function (Vendor Specific) Protected Area Function is to provide the 'protected area' which can not be accessed via conventional method. This 'protected area' is used to contain critical system data such as BIOS or system management information. The contents of entire system main memory may also be dumped into 'protected area' to resume after system power off.

  • Page 80: Write Cache Function

    Since the H D D works as 528MB device, there are no special care to use this device for normal use. 4. Advanced usage using protected area The data in protected area is accessed by following. Issue Read Native Max LBA/CYL command to get the real device max LBA/CYL.

  • Page 81: Reassign Function

    The conditions for auto-reallocation are described below. When a device shipped from IBM, minimum 526 of usable spare sectors are available. Non recovered write errors When a write operation can not be completed after the Error Recovery Procedure(ERP) is fully carried out, the sector(s) are reallocated to the spare location.
  • Page 82 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 83: Command Protocol

    In response to the interrupt, the host reads the Status Register. d. The device clears the interrupt in response to the Status Register being read. e. The host reads one sector (or block) of data via the Data Register. Copyright IBM Corp. 1997...

  • Page 84: Data Out Commands

    f. The device sets D R Q = 0 after the sector (or block)has been transferred to the host. 4. For the Read Long command: a. The device sets B S Y = 1 and prepares for data transfer. b. When the sector of data is available for transfer to the host, the device sets B S Y = 0 , sets D R Q = 1 , and interrupts the host.
  • Page 85 Write Sectors Write Verify Execution includes the transfer of one or more 512 byte ( > 5 1 2 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head Registers.

  • Page 86: Non-Data Commands

    11.3 Non-Data Commands These commands are: Check Power Mode Execute Device Diagnostic Format Unit Idle Idle Immediate Initialize Device Parameters Read Native Max LBA/CYL Read Verify Sectors Recalibrate Security Erase Prepare Security Freeze Lock Seek Set Features Set Max LBA/CYL Set Multiple Mode Sleep SMART Disable Operations...

  • Page 87: Dma Data Transfer Commands

    11.4 DMA Data Transfer Commands These commands are: Identify Device D M A Read D M A Write D M A Data transfer using D M A commands differ in two ways from PIO transfers: data transfers are performed using the slave-DMA channel no intermediate sector interrupts are issued on multi-sector commands Initiation of the D M A transfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave-DMA channel prior to issuing the command.
  • Page 88 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 89: Command Descriptions

    S e t M a x L B A / C Y L 1 1 1 1 1 0 0 1 S e t M u l t i p l e M o d e 1 1 0 0 0 1 1 0 Figure 45. Command Set Copyright IBM Corp. 1997...
  • Page 90 P r o t o C o m m a n d C o d e B i n a r y C o d e c o l ( H e x ) B i t 7 6 5 4 3 2 1 0 S l e e p 1 1 1 0 0 1 1 0 S l e e p *...
  • Page 91 C o m m a n d F e a t u r e C o m m a n d ( S u b c o m m a n d ) C o d e R e g i s t e r ( H e x ) ( H e x ) ( S .
  • Page 92 The following symbols are used in the command descriptions: Output Registers Indicates that the bit must be set to 0. Indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified.

  • Page 93: Check Power Mode (E5H/98H)

    12.1 Check Power Mode (E5h/98h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 94: Execute Device Diagnostic (90H)

    12.2 Execute Device Diagnostic (90h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 95: Format Track (50H: Vendor Specific)

    12.3 Format Track (50h: Vendor Specific) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 96 The head number of the track to be formatted. ( L = 0 ) In LBA mode, this register specifies LBA address bits 24 - 27 to be formatted. ( L = 1 ) Input Parameters From The Device Sector Number In LBA mode, this register specifies current LBA address bits 0-7.
  • Page 97 B y t e D a t a D e s c r i p t i o n x x h d e s c r i p t o r v a l u e f o r s e c t o r n u m b e r 0 0 h 0 0 h s e c t o r n u m b e r x x h...

  • Page 98: Format Unit (F7H: Vendor Specific)

    12.4 Format Unit (F7h: Vendor Specific) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 99 The execution time of this command is shown below. DTNA-22160 about 10min.24sec. DTNA-21800 about 9min.00sec. Command Descriptions...

  • Page 100: Identify Device (Ech)

    12.5 Identify Device (ECh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 101 W o r d C o n t e n t D e s c r i p t i o n 0 4 5 A H D r i v e c l a s s i f i c a t i o n , b i t a s s i g n m e n t s : 1 5 ( = 0 ) : 1 = A T A P I d e v i c e , 0 = A T A d e v i c e 1 4 ( = 0 ) : 1 = f o r m a t s p e e d t o l e r a n c e g a p r e q u i r e d 1 3 ( = 0 ) : 1 = t r a c k o f f s e t o p t i o n a v a i l a b l e...
  • Page 102 W o r d C o n t e n t D e s c r i p t i o n 0 2 0 0 H P I O d a t a t r a n s f e r c y c l e t i m i n g m o d e 0 2 0 0 H D M A d a t a t r a n s f e r c y c l e t i m i n g m o d e R e f e r W o r d 6 2 a n d 6 3...
  • Page 103 Note 1. The number of cylinders is 1068H for DTNA-22160, 0DACH for DTNA-21800, Note 2. The model number in ASCII is 'IBM-DTNA-22160' for DTNA-22160, 'IBM-DTNA-21800' for DTNA-21800, Note 3. Total number of user addressable sectors is 409980H for DTNA-22160, 35D540H for DTNA-21800,...

  • Page 104: Identify Device Dma (Eeh)

    12.6 Identify Device DMA (EEh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 105: Idle (E3H/97H)

    12.7 Idle (E3h/97h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 106: Idle Immediate (E1H/95H)

    12.8 Idle Immediate (E1h/95h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 107: Initialize Device Parameters (91H)

    12.9 Initialize Device Parameters (91h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 108: Read Buffer (E4H)

    12.10 Read Buffer (E4h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 109: Read Dma (C8H/C9H)

    12.11 Read DMA (C8h/C9h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 110 The head number of the first sector to be transferred. ( L = 0 ) In LBA mode, this register specifies LBA bits 24-27 to be transferred. ( L = 1 ) The retry bit. If set to one, then retries are disabled. Input Parameters From The Device Sector Count The number of requested sectors not transferred.

  • Page 111: Read Long (22H/23H)

    12.12 Read Long (22h/23h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 112 The head number of the sector to be transferred. ( L = 0 ) In LBA mode, this register contains LBA bits 24-27. ( L = 1 ) The retry bit. If set to one, then retries are disabled. Input Parameters From The Device Sector Count The number of requested sectors not transferred.

  • Page 113: Read Multiple (C4H)

    12.13 Read Multiple (C4h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 114 Input Parameters From The Device Sector Count The number of requested sectors not transferred. This will be zero, unless an unre- coverable error occurs. Sector Number The sector number of the last transferred sector. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 115: Read Native Max Lba/Cyl (F8H: Vendor Specific)

    12.14 Read Native Max LBA/CYL (F8h: Vendor Specific) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 116 Valid. Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the device. Indicates that the bit is not used. O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 117: Read Sectors (20H/21H)

    12.15 Read Sectors (20h/21h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 118 Input Parameters From The Device Sector Count The number of requested sectors not transferred. This will be zero, unless an unre- coverable error occurs. Sector Number The sector number of the last transferred sector. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 119: Read Verify Sectors (40H/41H)

    12.16 Read Verify Sectors (40h/41h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 120 Input Parameters From The Device Sector Count The number of requested sectors not verified. This will be zero, unless an unrecover- able error occurs. Sector Number The sector number of the last transferred sector. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 121: Recalibrate (1Xh)

    12.17 Recalibrate (1xh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 122: Security Disable Password (F6H)

    12.18 Security Disable Password (F6h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 123: Security Erase Prepare (F3H)

    12.19 Security Erase Prepare (F3h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 124: Security Erase Unit (F4H)

    12.20 Security Erase Unit (F4h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 125 Identifier Zero indicates that the device should check the supplied password against the user password stored internally. One indicates that the device should check the given pass- word against the master password stored internally. The Security Erase Unit command erases all user data and disables the security mode feature (device lock function).

  • Page 126: Security Freeze Lock (F5H)

    12.21 Security Freeze Lock (F5h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 127: Security Set Password (F1H)

    12.22 Security Set Password (F1h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 128 W o r d D e s c r i p t i o n C o n t r o l w o r d b i t 0 : I d e n t i f i e r ( 1 M a s t e r , 0 U s e r ) b i t 1 7...

  • Page 129: Security Unlock (F2H)

    12.23 Security Unlock (F2h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 130 W o r d D e s c r i p t i o n C o n t r o l w o r d b i t 0 : I d e n t i f i e r ( 1 M a s t e r , 0 U s e r ) b i t 1 1 5...

  • Page 131: Seek (7Xh)

    12.24 Seek (7xh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 132: Set Features (Efh)

    12.25 Set Features (EFh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 133 Note 1. When Feature register is 03h ( = S e t Transfer mode), the Sector Count Register specifies the transfer mech- anism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. PIO Default Transfer Mode 00000 000 PIO Default Transfer Mode,Disable IORDY...

  • Page 134: Set Max Lba/Cyl (F9H: Vendor Specific)

    12.26 Set Max LBA/CYL (F9h: Vendor Specific) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 135 Output Parameters To The Device Option bit for selection whether nonvolatile or volatile. B = 0 is volatile condition. When B = 1 , MAX LBA/CYL which is set by Set Max LBA/CYL command is pre- served by P O R and H A R D RESET. When B = 0 , MAX LBA/CYL which is set by Set Max LBA/CYL command will be lost by P O R and H A R D RESET.

  • Page 136: Set Multiple (C6H)

    12.27 Set Multiple (C6h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 137: Sleep (E6H/99H)

    12.28 Sleep (E6h/99h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 138: Function Set (B0H)

    12.29 S.M.A.R.T. Function Set (B0h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 139 SMART Return Status 12.29.1.1 SMART Read Attribute Values (Subcommand D0h) This subcommand returns the device's Attribute Values to the host. Upon receipt of the SMART Read Attribute Values subcommand from the host, the device asserts BSY, saves any updated Attribute Values to the Attribute Data sectors, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Value information from the device via the Data Register.
  • Page 140 12.29.1.5 SMART Execute Off-line Immediate (Subcommand D4h) This subcommand causes the device to immediately initiate the set of off-line data collection activities that collect attribute data in an off-line mode. Upon receipt of the subcommand from the host, the device sets BSY to one, begins its set of off-line data collection activities, clears BSY to zero and asserts INTRQ.

  • Page 141: Device Attributes Data Structure

    and will be aborted by the device (including the SMART Disable Operations subcommand), returning the error code as specified in Figure 90 on page 142. Any Attribute Values accumulated and saved to volatile memory prior to receipt of the SMART Disable Operations command will be preserved in the device's Attribute Data Sectors.

  • Page 142: Individual Attribute Data Structure

    D e s c r i p t i o n B y t e s O f f s e t F o r m a t V a l u e D a t a S t r u c t u r e R e v i s i o n N u m b e r 0 0 h b i n a r y 0 0 0 5 h...
  • Page 143 D e s c r i p t i o n B y t e s O f f s e t F o r m a t A t t r i b u t e I D N u m b e r ( 0 1 h t o F F h ) 0 0 h b i n a r y S t a t u s F l a g s...
  • Page 144 Seek Error Rate Seek Time Performance (*) Power-On Hours Count Spin Retry Count Device Power Cycle Count Disk Shift | 221 G-Sense Error Rate O E M Specifications of DTNA-2xxxx 2.5 inch H D D...
  • Page 145 12.29.2.2.2 Status Flag Definitions B i t F l a g N a m e D e f i n i t i o n P r e F a i l u r e / I f b i t = 0 , a n A t t r i b u t e V a l u e l e s s t h a n o r A d v i s o r y b i t e q u a l t o i t s c o r r e s p o n d i n g A t t r i b u t e T h r e s h o l d i n d i c a t e s a n A d v i s o r y c o n d i t i o n...
  • Page 146 Segment completed without error All segments completed without errors. In this case, current segment pointer equals to total seg- ments required. Off-line data collecting aborted by interrupting command Off-line data collection aborted with fatal error 12.29.2.4 Total Segments Required for Off-line Data Collection The device will return 07h as the total segments for off-line data collection.

  • Page 147: Device Attribute Thresholds Data Structure

    12.29.2.8 S.M.A.R.T. Capability This word of bit flags describes the S.M.A.R.T. capabilities of the device. The device will return 03h as its S.M.A.R.T. capability which means: Definition Power mode attribute saving capability If bit = 1, the device will save its Attribute Values prior to going into a power saving mode (Standby or Sleep mode).
  • Page 148 D e s c r i p t i o n B y t e s O f f s e t F o r m a t V a l u e D a t a S t r u c t u r e R e v i s i o n N u m b e r 0 0 h b i n a r y 0 0 0 5 h...

  • Page 149: Error Reporting

    D e s c r i p t i o n B y t e s O f f s e t F o r m a t A t t r i b u t e I D N u m b e r ( 0 1 h t o F F h ) 0 0 h b i n a r y A t t r i b u t e T h r e s h o l d ( f o r c o m p a r i s o n w i t h...
  • Page 150 E r r o r C o n d i t i o n S t a t u s E r r o r R e g i s t e r R e g i s t e r A S .

  • Page 151: Standby (E2H/96H)

    12.30 Standby (E2h/96h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 152: Standby Immediate (E0H/94H)

    12.31 Standby Immediate (E0h/94h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 153: Write Buffer (E8H)

    12.32 Write Buffer (E8h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...

  • Page 154: Write Dma (Cah/Cbh)

    12.33 Write DMA (CAh/CBh) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 155 The head number of the first sector to be transferred. ( L = 0 ) In LBA mode, this register contains LBA bits 24 - 27. ( L = 1 ) The retry bit. If set to one, then retries are disabled. But ignored, when write cache is enabled.

  • Page 156: Write Long (32H/33H)

    12.34 Write Long (32h/33h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 157 Input Parameters From The Device Sector Count The number of requested sectors not transferred. Sector Number The sector number of the sector to be transferred. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the sector to be transferred.

  • Page 158: Write Multiple (C5H)

    12.35 Write Multiple (C5h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 159 Input Parameters From The Device Sector Count The number of requested sectors not transferred. This will be zero, unless an unre- coverable error occurs. Sector Number The sector number of the last transferred sector. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 160: Write Sectors (30H/31H)

    12.36 Write Sectors (30h/31h) C o m m a n d B l o c k O u t p u t R e g i s t e r s C o m m a n d B l o c k I n p u t R e g i s t e r s R e g i s t e r 7 6 5 4 3 2 1 0 R e g i s t e r...
  • Page 161 Input Parameters From The Device Sector Count The number of requested sectors not transferred. This will be zero, unless an unre- coverable error occurs. Sector Number The sector number of the last transferred sector. ( L = 0 ) In LBA mode, this register contains current LBA bits 0 - 7. ( L = 1 ) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 162: Write Verify (3Ch: Vendor Specific)

    12.37 Write Verify (3Ch: Vendor Specific) In DTNA-xxxxx implementation, Write Verify command is exactry same as Write Sectors command(30h). No read verification is performed after write operation. Refer Write Sectors Command for parameters. O E M Specifications of DTNA-2xxxx 2.5 inch H D D...
  • Page 163 Command Descriptions...
  • Page 164 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 165: Timings

    3 0 s e c C o m m a n d C o m p l e t e B S Y = 1 ( N o t e . 2 ) Figure 98. Timeout Values Copyright IBM Corp. 1997...
  • Page 166 F U N C T I O N I N T E R V A L S T A R T S T O P T I M E O U T D M A D a t a D e v i c e B u s y a f t e r O u t t o C o m m a n d S t a t u s R e g i s t e r 4 0 0 n s...
  • Page 167 Timings...
  • Page 168 O E M Specifications of DTNA-2xxxx 2.5 inch H D D...

  • Page 169: Appendix

    R e s e r v e d A 0 h A F h R e s e r v e d R e s e r v e d R e s e r v e d Figure 100. Command coverage Copyright IBM Corp. 1997...
  • Page 170 C o m m a n d C o m m a n d I m p l e m e n t a t i o n A T A 3 C a t e g o l y C o d e N a m e f o r D T N A 2 X X X X...
  • Page 171 N o t e : ( 1 ) T h e s e c o m m a n d s h a v e t w o c o m m a n d c o d e s a n d a p p e a r i n t h i s t a b l e t w i c e , o n c e f o r e a c h c o m m a n d c o d e .

  • Page 172: Set Features Command Support Coverage

    14.2 SET FEATURES Command Support Coverage Following table is provided to facilitate the understanding of DTNA-xxxxx "Set Features" command support coverage comparing to the ATA-3 defined command set. The column of 'Implementation' shows the capa- bility of DTNA-xxxxx for those commands. For detail operation, refer to 12.25, “Set Features (EFh)” on page 124.

  • Page 173: Index

    Security Disable Password (F6h) Security Erase Prepare (F3h) Security Erase Unit (F4h) Security Freeze Lock (F5h) Security Set Password (F1h) Security Unlock (F2h) Seek (7xh) Set Features (EFh) Set Max LBA/CYL (F9h) Set Multiple (C6h) Sleep (E6h/99h) Copyright IBM Corp. 1997...
  • Page 174 Register (continued) Sector Count Register Identify Device 75, 92 Sector Number Register Identify Device D M A 79, 96 Status Register Idle 78, 97 Register Initialization Idle Immediate 78, 98 Reset I D N Diagnostic and Reset considerations I D N F Register Initialization Initial Power Mode at Power On Initialize Device Parameters...
  • Page 175 Write Buffer 76, 145 Write Cache Write D M A 79, 146 Write Long 76, 148 Write Multiple 76, 150 Write Sectors 76, 152 Write Verify 77, 154 W T G Index...
  • Page 176 S46H-5175-03 Published in Japan...

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