Ultra Dma Data Transfer; 5.6.3.1 Initiating An Ultra Dma Data In Burst - Fujitsu MPG3XXXAH Product Manual

5.6.3

Ultra DMA data transfer

Figures 5.10 through 5.19 define the timings associated with all phases of Ultra DMA bursts.
Table 5.16 contains the values for the timings for each of the Ultra DMA Modes.

5.6.3.1 Initiating an Ultra DMA data in burst

5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.
DMARQ
(device)
DMACK-
(host)
STOP
(host)
HDMARDY-
(host)
DSTROBE
(device)
DD (15:0)
DA0,DA1,DA2,
CS0-,CS1-
Note:
The definitions for the STOP, HDMARDY-and DSTROBE signal lines are not in effect until
DMARQ and DMACK- are asserted.
t
UI
t
t
ACK
ENV
t
ACK t
ENV
t
ZIORDY
t
AZ
t
ACK
Figure 5.10 Initiating an Ultra DMA data in burst
C141-E112-01EN
t
FS
t
ZAD
t
FS
t
ZAD
t
ZFS
t
DZFS
t
VDS
t
DVH
5 - 91