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Manuals and User Guides for Fujitsu MHC2032AT. We have
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Fujitsu MHC2032AT manual available for free PDF download: Product Manual
Fujitsu MHC2032AT Product Manual (219 pages)
Fujitsu Computer Drive - CD Drive User Manual
Brand:
Fujitsu
| Category:
Storage
| Size: 2 MB
Table of Contents
For Safe Operation
2
Revision History
4
Overview of Manual
6
Operating Environment
7
Important Alert Items
10
Important Alert Messages
10
Table of Contents
12
CHAPTER 1 Device Overview
20
Features
21
Functions and Performance
21
Adaptability
21
Interface
22
Table 1.1 Specifications (MHC2032AT/MHC2040AT)
23
Device Specifications
23
Specifications Summary
23
Table 1.2 Specifications (MHD2021AT/MHD2032AT)
24
Table 1.3 Model Names and Product Numbers
25
Model and Product Number
25
Power Requirements
25
Figure 1.1 Current Fluctuation (Typ.) at +5V When Power Is Turned on
26
Table 1.4 Current and Power Dissipation
26
Table 1.5 Environmental Specifications
27
Table 1.6 Acoustic Noise Specification
27
Environmental Specifications
27
Acoustic Noise
27
Table 1.7 Shock and Vibration Specification
28
Shock and Vibration
28
Reliability
28
Error Rate
29
Media Defects
29
Chapter 2 Device Configuration
30
Device Configuration
31
Figure 2.1 Disk Drives Outerview (the MHC Series and MHD Series)
31
Figure 2.2 Configuration of Disk Media Heads
32
System Configuration
33
ATA Interface
33
Drive Connection
33
Figure 2.3 1 Drive System Configuration
33
Drives Connection
34
Figure 2.4 2 Drives Configuration
34
Chapter 3 Installation Conditions
36
Dimensions
37
Mounting
39
Figure 3.2 Orientation (Sample: MHC2040AT)
39
Figure 3.3 Mounting Frame Structure
40
Figure 3.4 Surface Temperature Measurement Points (Sample: MHC2040AT)
41
Figure 3.5 Service Area (Sample: MHC2040AT)
42
Cable Connections
43
Device Connector
43
Figure 3.6 Connector Locations (Sample: MHC2040AT)
43
Table 3.2 Cable Connector Specifications
44
Cable Connector Specifications
44
Device Connection
44
Figure 3.7 Cable Connections
44
Power Supply Connector (CN1)
45
Jumper Settings
45
Location of Setting Jumpers
45
Figure 3.8 Power Supply Connector Pins (CN1)
45
Figure 3.9 Jumper Location
45
Factory Default Setting
46
Master Drive-Slave Drive Setting
46
Figure 3.10 Factory Default Setting
46
Figure 3.11 Jumper Setting of Master or Slave Device
46
CSEL Setting
47
Figure 3.12 CSEL Setting
47
Figure 3.13 Example (1) of Cable Select
47
Figure 3.14 Example (2) of Cable Select
48
CHAPTER 4 Theory of Device Operation
50
Outline
51
Subassemblies
51
Disk
51
Head
51
Spindle
52
Actuator
52
Air Filter
52
Figure 4.1 Head Structure
52
Circuit Configuration
53
Figure 4.2 Circuit Configuration
54
Power-On Sequence
55
Self-Calibration
56
Self-Calibration Contents
56
Figure 4.3 Power-On Operation Sequence
56
Execution Timing of Self-Calibration
57
Table 4.1 Self-Calibration Execution Timechart
58
Command Processing During Self-Calibration
58
Read/Write Circuit
58
Read/Write Preamplifier (Preamp)
58
Table 4.2 Write Precompensation Algorithm
59
Write Circuit
59
Figure 4.4 Read/Write Circuit Block Diagram
60
Read Circuit
61
Figure 4.5 Frequency Characteristic of Programmable Filter
61
Digital PLL Circuit
62
Servo Control
63
Servo Control Circuit
63
Figure 4.6 Block Diagram of Servo Control Circuit
63
Figure 4.7 Physical Sector Servo Configuration on Disk Surface
65
Index
66
Data-Surface Servo Format
67
Servo Frame Format
67
Figure 4.8 Servo Frame Format
67
Actuator Motor Control
68
Spindle Motor Control
69
Chapter 5 Interface
72
Physical Interface
73
Interface Signals
73
Figure 5.1 Interface Signals
73
Table 5.1 Signal Assignment on the Interface Connector
74
Signal Assignment on the Connector
74
Logical Interface
77
Table 5.2 I/O Registers
78
I/O Registers
78
Command Block Registers
79
Control Block Registers
84
Host Commands
84
Table 5.3 Command Code and Parameters
85
Command Code and Parameters
85
Command Descriptions
87
READ SECTOR(S) (X'20' or X'21')
88
Read Multiple (X'c4')
89
Figure 5.2 Execution Example of READ MULTIPLE Command
91
SECURITY ERASE PREPARE (F3H)
132
Table 5.10 Contents of Security Password
132
SECURITY ERASE UNIT (F4H)
133
SECURITY FREEZE LOCK (F5H)
134
Table 5.11 Contents of SECURITY SET PASSWORD Data
136
Locked Mode
137
Table 5.12 Relationship between Combination of Identifier and Security Level, and Operation of the Lock Function
137
READ DMA (X'C8' or X'C9')
92
READ VERIFY SECTOR(S) (X'40' or X'41')
93
WRITE SECTOR(S) (X'30' or X'31')
94
Write Multiple (X'c5')
96
WRITE DMA (X'CA' or X'CB')
97
Write Verify (X'3C')
98
Initialize Device Parameters (X'91')
101
Identify Device (X'ec')
102
Identify Device Dma (X'ee')
108
Set Features (X'ef')
109
Table 5.5 Features Register Values and Settable Modes
109
Set Multiple Mode (X'c6')
111
Execute Device Diagnostic (X'90')
113
READ LONG (X'22' or X'23')
114
Table 5.6 Diagnostic Code
114
WRITE LONG (X'32' or X'33')
115
Read Buffer (X'e4')
116
Write Buffer (X'e8')
117
IDLE (X'97' or X'E3')
118
IDLE IMMEDIATE (X'95' or X'E1')
120
STANDBY (X'96' or X'E2')
120
STANDBY IMMEDIATE (X'94' or X'E0')
121
SLEEP (X'99' or X'E6')
122
CHECK POWER MODE (X'98' or X'E5')
123
Table 5.7 Features Register Values (Subcommands) and Functions
125
Table 5.8 Format of Device Attribute Value Data
127
Table 5.9 Format of Insurance Failure Threshold Value Data
128
SECURITY DISABLE PASSWORD (F6H)
131
Error Posting
139
Table 5.13 Command Code and Parameters
139
Data Transferring Commands from Device to Host
141
Command Protocol
141
Figure 5.3 Read Sector(S) Command Protocol
142
Data Transferring Commands from Host to Device
143
Figure 5.4 Protocol for Command Abort
143
Figure 5.5 WRITE SECTOR(S) Command Protocol
144
Commands Without Data Transfer
145
DMA Data Transfer Commands
146
Other Commands
146
Figure 5.7 Normal DMA Data Transfer
147
Ultra DMA Feature Set
148
Overview
148
Ultra DMA Burst Initiation Phase
149
Phases of Operation
149
Ultra DMA Burst Termination Phase
150
Data Transfer Phase
150
Initiating an Ultra DMA Data in Burst
151
Ultra DMA Data in Commands
151
Pausing an Ultra DMA Data in Burst
152
The Data in Transfer
152
Terminating an Ultra DMA Data in Burst
153
Initiating an Ultra DMA Data out Burst
156
Ultra DMA Data out Commands
156
The Data out Transfer
156
Pausing an Ultra DMA Data out Burst
157
Terminating an Ultra DMA Data out Burst
158
Ultra DMA CRC Rules
160
Figure 5.8 an Example of Generation of Parallel CRC
161
Table 5.14 Parallel Generation Equation of CRC Polynomial
161
Series Termination Required for Ultra DMA
162
Figure 5.9 Ultra DMA Termination with Pull-Up or Pull-Down
162
Table 5.15 Recommended Series Termination for Ultra DMA
162
PIO Data Transfer
163
Timing
163
Figure 5.10 Data Transfer Timing
164
Single Word DMA Data Transfer
165
Figure 5.11 Single Word DMA Data Transfer Timing (Mode 2)
165
Multiword DMA Data Transfer
166
Figure 5.12 Multiword DMA Data Transfer Timing (Mode 2)
166
Starting of Ultra DMA Data in Burst
167
Transfer of Ultra DMA Data
167
Figure 5.13 Starting of Ultra DMA Data in Burst Transfer
167
Ultra DMA Data Burst Timing Requirements
168
Table 5.16 Ultra DMA Data Burst Timing Requirements
168
Sustained Ultra DMA Data in Burst
170
Figure 5.14 Sustained Ultra DMA Data in Burst
170
Host Pausing an Ultra DMA Data in Burst
171
Figure 5.15 Host Pausing an Ultra DMA Data in Burst
171
Device Terminating an Ultra DMA Data in Burst
172
Figure 5.16 Device Terminating an Ultra DMA Data in Burst
172
Host Terminating an Ultra DMA Data in Burst
173
Figure 5.17 Host Terminating an Ultra DMA Data in Burst
173
Initiating an Ultra DMA Data out Burst
174
Figure 5.18 Initiating an Ultra DMA Data out Burst
174
Sustained Ultra DMA Data out Burst
175
Figure 5.19 Sustained Ultra DMA Data out Burst
175
Device Pausing an Ultra DMA Data out Burst
176
Figure 5.20 Device Pausing an Ultra DMA Data out Burst
176
Host Terminating an Ultra DMA Data out Burst
177
Figure 5.21 Host Terminating an Ultra DMA Data out Burst
177
Device Terminating an Ultra DMA Data in Burst
178
Figure 5.22 Device Terminating an Ultra DMA Data out Burst
178
Power-On and Reset
179
Figure 5.23 Power on Reset Timing
179
CHAPTER 6 Operations
180
Response to Power-On
181
Device Response to the Reset
181
Figure 6.1 Response to Power-On
182
Response to Hardware Reset
183
Figure 6.2 Response to Hardware Reset
183
Response to Software Reset
184
Figure 6.3 Response to Software Reset
184
Response to Diagnostic Command
185
Figure 6.4 Response to Diagnostic Command
185
Table 6.1 Default Parameters
186
Default Parameters
186
Address Translation
186
Logical Address
187
Figure 6.5 Address Translation (Example in CHS Mode)
187
Power Save Mode
188
Figure 6.6 Address Translation (Example in LBA Mode)
188
Power Save
188
Power Commands
190
Defect Management
190
Alternating Defective Sectors
191
Spare Area
191
Figure 6.7 Sector Slip Processing
191
Figure 6.8 Alternate Cylinder Assignment
192
Data Buffer Configuration
193
Caching Operation
193
Figure 6.9 Data Buffer Configuration
193
Read-Ahead Cache
193
Usage of Read Segment
195
Mis-Hit (no Hit)
195
Sequential Read
196
Full Hit (Hit All)
199
Partially Hit
200
Write Cache
201
Glossary
204
Acronyms and Abbreviations
208
Comment Form
217
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