Memory Bus Write Access - AMD Am79C930 Preliminary Manual

AMD

MEMORY BUS WRITE ACCESS

Parameter
Symbol Parameter Description
tmAD MA[16:0] valid from CLKIN
CE active delay from CLKIN
tmCD
MWE active delay from CLKIN
tmWD
tmCQ MD[16:0] driven from CLKIN
tmCV MD[16:0] valid from CLKIN
Address Setup Time to MWE
tmAS
tmAW Address Write Access Time
(Note 3)
CE Write Access Time
tmCW
(Notes 1, 3)
MWE Write Access Time
tmWP
(Note 3)
MWE
tmWQ
MA[16:0] valid hold from MWE
tmAH
CE valid hold from MWE
tmCH
CE Inactive Time
tmWI
MD[7:0] valid setup to MWE
tmSW
MD[7:0] valid hold from MWE
tmHW
MD[7:0] inactive from MWE
tmHWZ
Notes:
1. CE = one of: FCE , SCE , XCE
2. Parameter not included in the production test.
3. Value is dependent upon TCLKIN value. Value given is for CLKIN = 40 MHz.
138
P R E L I M I N A R Y
to MD[7:0] driven
Test Conditions
Note 1
0 wait states
1 wait state
2 wait states
0 wait states
1 wait state
2 wait states
0 wait states
1 wait state
2 wait states
Note 1
Note 1, 2
0 wait states
1 wait state
2 wait states
Note 2
Note 2
Am79C930
Min Max
2 60
2 60
2 60
2
60
TCLKIN-20
95
145
195
95
145
195
90
140
190
–10
TCLKIN-10
TCLKIN-10
0
80
130
180
TCLKIN-15
2 X TCLKIN-10 2 X TCLKIN+10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns